SI5335A-B04116-GM

Clock Generators, PLLs, Frequency Synthesizers Overview

The SI5335A-B04116-GM is a web-customizable, any-frequency, any-output quad clock generator and buffer from Skyworks Solutions. It synthesizes four non-integer-related frequencies up to 350 MHz using MultiSynth technology, ensuring 0 ppm frequency synthesis error. The device supports three independent pin-selectable configurations and features flexible output drivers compatible with LVPECL, LVDS, CML, HCSL, CMOS, SSTL, and HSTL formats. It operates on a single core supply of 1.8 V, 2.5 V, or 3.3 V, with individual output voltage selection. Key specifications include a typical RMS phase jitter of 0.7 ps, a 24-QFN (4x4 mm) package, and an operating temperature range of –40 to +85 °C.

Clock Generators, PLLs, Frequency Synthesizers Feature Summary

• MultiSynth fractional divider technology enables independent synthesis of four frequencies up to 350 MHz with 0 ppm error.
• Supports three independent, user-assignable, pin-selectable device configurations for system flexibility.
• Flexible input reference options including external crystals (25/27 MHz), CMOS, SSTL/HSTL, and differential inputs.
• Configurable output drivers support multiple formats (LVPECL, LVDS, CML, HCSL, CMOS, SSTL, HSTL) with independent voltage levels.

Clock Generators, PLLs, Frequency Synthesizers Applications

• PCI Express Gen 1/2/3/4 common clock and jitter attenuation
• Ethernet switch/router and 1 GbE/10 GbE interfaces
• DSL jitter attenuation and MSAN/DSLAM/PON systems
• Processor and FPGA clocking

Clock Generators, PLLs, Frequency Synthesizers Procurement Notes

Verify the specific factory configuration encoded in the ordering suffix B04116 against the target system requirements using the ClockBuilder Pro utility. Confirm that the 24-VFQFN exposed pad package aligns with the PCB land pattern design. Ensure the selected core and output supply voltages match the available power rails in the application environment.

Clock Generators, PLLs, Frequency Synthesizers Selection Notes

Select this component when a single device must replace multiple clock generators or buffers by providing four distinct output frequencies. Choose the appropriate loop bandwidth (1.6 MHz or 475 kHz) based on whether jitter attenuation for PCIe or DSL applications is required. Verify that the input source matches one of the supported formats, such as a 25 MHz crystal or a differential CMOS signal.

Clock Generators, PLLs, Frequency Synthesizers Part Context

This part belongs to the Si5335 family of highly flexible clock generators. The 'A' designation typically indicates a specific revision or feature set within the series, while the suffix defines the pre-programmed configuration. It serves as a drop-in replacement for fixed-frequency oscillators and multiple discrete buffer ICs in complex digital systems.

Clock Generators, PLLs, Frequency Synthesizers Replacement Considerations

Direct functional replacements within the same family include other Si5335 variants with different configuration suffixes. For pin-compatible alternatives with similar performance, consider the Si5338 series, which offers additional outputs. Always verify electrical parameters and pin assignments before substitution.

Clock Generators, PLLs, Frequency Synthesizers FAQ

What is the maximum output frequency supported by the SI5335A?

The device supports output frequencies up to 350 MHz for LVPECL, LVDS, CML, SSTL, and HSTL formats. HCSL outputs are supported up to 250 MHz, and CMOS outputs up to 200 MHz.

How does the device handle frequency synthesis error?

Using Skyworks' patented MultiSynth fractional divider technology, all outputs are guaranteed to have 0 ppm frequency synthesis error regardless of the configuration.

Can the device operate in both clock generator and buffer modes?

Yes, the Si5335 can be configured as either a clock generator using its internal PLL or as a clock buffer device by bypassing the PLL.