SI5335D-B05057-GM

Clock Generators, PLLs, Frequency Synthesizers Overview

The SI5335D-B05057-GM is a web-customizable, any-frequency, any-output quad clock generator and buffer from Skyworks Solutions. It synthesizes four non-integer-related frequencies up to 350 MHz using MultiSynth technology, ensuring 0 ppm frequency synthesis error. The device supports three independent pin-selectable configurations and features flexible input references including external crystals (25/27 MHz), CMOS, SSTL/HSTL, and differential inputs. Outputs are configurable as LVPECL, LVDS, CML, HCSL, CMOS, or SSTL/HSTL with independent voltage levels of 1.5, 1.8, 2.5, or 3.3 V. It operates on a single core supply of 1.8, 2.5, or 3.3 V within an ambient temperature range of –40 to +85 °C.

Clock Generators, PLLs, Frequency Synthesizers Feature Summary

• Four-output clock generator/buffer with 0 ppm frequency synthesis error
• Supports three independent, user-assignable, pin-selectable device configurations
• Flexible input reference: External crystal, CMOS, SSTL/HSTL, or differential
• Configurable output drivers supporting LVPECL, LVDS, CML, HCSL, CMOS, and SSTL/HSTL

Clock Generators, PLLs, Frequency Synthesizers Applications

• PCI Express Gen 1/2/3/4 common clock and jitter attenuation
• Ethernet switch/router and 1 GbE/10 GbE interfaces
• DSL jitter attenuation and MSAN/DSLAM/PON systems
• Processor and FPGA clocking
• Broadcast video/audio timing and Fibre Channel/SAN

Clock Generators, PLLs, Frequency Synthesizers Procurement Notes

Verify the specific factory configuration encoded in the B05057 suffix against system requirements. Confirm that the pin-selectable control functions (SSENB, RESET, OEB, FS) align with the hardware design. Ensure the required output formats and frequencies are supported by this specific customization instance.

Clock Generators, PLLs, Frequency Synthesizers Selection Notes

Select this component when multiple distinct clock frequencies are required from a single package. Choose between PLL modes for jitter attenuation or bypass mode for buffering based on input signal quality. Verify that the target application frequencies fall within the specified limits for each output format (e.g., 350 MHz max for LVDS vs. 200 MHz for CMOS).

Clock Generators, PLLs, Frequency Synthesizers Part Context

This part belongs to the Si5335 family of highly flexible clock generators. The 'D' indicates a specific performance grade or feature set within the series, while 'B05057' denotes a unique factory-programmed configuration. The 'GM' suffix specifies the 24-lead QFN package with an exposed pad.

Clock Generators, PLLs, Frequency Synthesizers Replacement Considerations

Direct replacements must match the specific B05057 configuration. Generic Si5335 devices require reprogramming via ClockBuilder Pro if the exact frequency plan and pin assignments are not identical. Verify compatibility with existing PCB land patterns and thermal requirements.