SI5335D-B05869-GMR

Overview

The SI5335D-B05869-GMR is a web-customizable, any-frequency, any-output quad clock generator and buffer from Skyworks Solutions. It synthesizes four non-integer-related frequencies up to 350 MHz using MultiSynth technology, ensuring 0 ppm frequency synthesis error. The device supports flexible input references including external crystals (25/27 MHz), CMOS, SSTL/HSTL, and differential inputs. Outputs are independently configurable for LVPECL, LVDS, CML, HCSL, CMOS, or SSTL/HSTL formats with selectable supply voltages of 1.5, 1.8, 2.5, or 3.3 V. It features low phase jitter of 0.7 ps RMS, two selectable PLL loop bandwidths (1.6 MHz or 475 kHz), and operates on a single core supply of 1.8, 2.5, or 3.3 V within a –40 to +85 °C temperature range.

Feature Summary

• Four independent output banks supporting any frequency (< 350 MHz) with 0 ppm synthesis error via MultiSynth fractional divider technology
• Configurable as a clock generator or buffer with support for three independent, pin-selectable device configurations
• Flexible input options: External crystal (25/27 MHz), CMOS (10–200 MHz), SSTL/HSTL, or Differential (10–350 MHz)
• Low phase jitter of 0.7 ps RMS typical, with selectable PLL loop bandwidths of 1.6 MHz or 475 kHz for jitter attenuation

Applications

• PCI Express Gen 1/2/3/4 common clock and SRNS compliant systems
• Ethernet switch/router and 1 GbE/10 GbE interfaces
• DSL jitter attenuation and telecom line cards
• Processor and FPGA clocking in broadcast video/audio timing applications

Procurement Notes

Verify the specific factory configuration encoded in the ordering suffix B05869 against system requirements, as this part is a custom web-configured device. Confirm that the required input reference type (e.g., crystal vs. CMOS) and output voltage levels match the design specifications. Ensure compatibility with the ClockBuilder Pro utility for final validation of the generated configuration file.

Selection Notes

Select this component when multiple distinct clock frequencies are required from a single source with zero ppm error. Choose between the 1.6 MHz or 475 kHz loop bandwidth based on whether jitter attenuation or faster lock time is prioritized. Ensure the target application supports the 24-QFN package dimensions and thermal characteristics specified for the Si5335 family.

Part Context

This part belongs to the Si5335 family of highly flexible clock generators. The 'D' variant typically denotes specific performance or packaging attributes within the Skyworks portfolio, while the alphanumeric suffix indicates a unique factory-programmed configuration. It serves as a replacement for multiple discrete clock oscillators and buffers in complex digital systems.

Replacement Considerations

Direct replacements require identical factory configurations. Generic Si5335 variants may differ in output drive strength, power consumption, or specific frequency plans. Verify pin-to-pin compatibility and ensure the substitute device supports the same input reference types and output voltage levels.