SI5342A-B03868-GMR

Clock Generators, PLLs, Frequency Synthesizers Overview

The Skyworks Solutions Inc. SI5342A-B03868-GMR is a jitter attenuator and clock multiplier featuring four inputs and two outputs housed in a 44-QFN package. It supports differential input frequencies from 8 kHz to 750 MHz and LVCMOS inputs up to 250 MHz. Output frequencies range from 100 Hz to 1028 MHz for differential signals and up to 250 MHz for LVCMOS. The device achieves an ultra-low jitter of 90 fs rms and operates within a temperature range of –40 °C to +85 °C.

Clock Generators, PLLs, Frequency Synthesizers Feature Summary

• Generates any combination of output frequencies from any input frequency using fourth-generation DSPLL technology.
• Supports hitless input clock switching between fractionally related clocks without propagating phase offsets.
• Includes in-circuit programmable non-volatile memory to ensure known frequency configuration upon power-up.
• Features fully integrated loop filter and digitally programmable jitter attenuation bandwidth.

Clock Generators, PLLs, Frequency Synthesizers Applications

• OTN muxponders and transponders
• 10/40/100 G networking line cards
• GbE/10 GbE/100 GbE Synchronous Ethernet (ITU-T G.8262)
• Carrier Ethernet switches

Clock Generators, PLLs, Frequency Synthesizers Procurement Notes

Verify the specific factory preprogrammed configuration associated with the B03868 suffix against project requirements, as this identifier denotes a unique numerical sequence representing the preprogrammed settings assigned by Skyworks. Confirm that the tape and reel packaging option aligns with automated assembly processes. Ensure compatibility with I2C or SPI control interfaces during integration.

Clock Generators, PLLs, Frequency Synthesizers Selection Notes

Select the Si5342 variant when only two output clocks are required, distinguishing it from the four-output Si5344 and ten-output Si5345 models. This component is suitable for applications demanding ultra-low jitter performance and flexible frequency synthesis. Utilize ClockBuilder Pro software to configure the integer and fractional synthesis modes and verify support for LVDS, LVPECL, LVCMOS, CML, and HCSL output formats.

Clock Generators, PLLs, Frequency Synthesizers Part Context

This component belongs to the Si5345/44/42 Rev D family, which combines fourth-generation DSPLL and MultiSynth technologies. The Si5342 specifically provides four inputs and two outputs in a compact 44-QFN 7x7 mm package. The series supports free-run, synchronous, and holdover modes with automatic or manual input clock switching capabilities.

Clock Generators, PLLs, Frequency Synthesizers Replacement Considerations

Si5342A-D-GMR

Clock Generators, PLLs, Frequency Synthesizers FAQ

What is the maximum output frequency supported by the Si5342?

The Si5342 supports differential output frequencies up to 1028 MHz and LVCMOS output frequencies up to 250 MHz.

How does the device handle input clock failures?

The device automatically enters holdover mode when the selected input clock becomes invalid and no other valid inputs are available, utilizing stored historical frequency data to minimize disturbance.

Is external programming required for operation?

No, the device features in-circuit programmable non-volatile memory (NVM) so it always powers up with a known frequency configuration.