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SI5345A-B03682-GMR is listed in the Clock Generators, PLLs, Frequency Synthesizers range at ChipApex. The manufacturer field lists Skyworks Solutions Inc.. Its product description is IC CLK MULTIPLIER ATTENUATOR. Review the specifications below when checking this part for your BOM.
The SI5345A-B03682-GMR is a low-jitter, 10-output clock synthesizer and jitter attenuator from Skyworks Solutions. It utilizes fourth-generation DSPLL and MultiSynth technologies to generate any frequency combination from any input source. The device supports differential inputs up to 750 MHz and LVCMOS inputs up to 250 MHz. Output frequencies range from 100 Hz to 1028 MHz for differential formats and up to 250 MHz for LVCMOS. It features an ultra-low jitter performance of 90 fs rms and operates within a temperature range of -40°C to +85°C.
Verify the specific ordering suffix against the manufacturer's current documentation to confirm package type and tape-and-reel specifications. Ensure compatibility with the ClockBuilder Pro software version used for configuration. Confirm that the factory preprogrammed configuration matches the required application parameters before deployment.
Select this component when high-frequency generation up to 1028 MHz is required alongside ultra-low jitter performance. The Si5345A variant specifically supports both integer and fractional synthesis modes across all outputs. Verify that the system design accommodates the QFN-64 package dimensions and thermal requirements for the specified operating temperature range.
This part belongs to the Si5345 family of jitter attenuators, which also includes the Si5344 and Si5342 variants. These devices share common architectural features such as the DSPLL core and MultiSynth technology but differ in the number of available output clocks. The Si5345 provides the highest channel count within this series.
Direct replacements include other Si5345A variants with different factory preprogramming configurations. Cross-family substitution with Si5344 or Si5342 requires verifying pin compatibility and ensuring the reduced output count meets system requirements.
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