SI5345A-B04379-GMR

Clock Generators, PLLs, Frequency Synthesizers Overview

The SI5345A-B04379-GMR is a 10-output, any-frequency jitter attenuator and clock multiplier from Skyworks Solutions. It utilizes fourth-generation DSPLL and MultiSynth technologies to generate output frequencies ranging from 100 Hz to 1028 MHz with ultra-low jitter of 90 fs rms. The device supports differential inputs up to 750 MHz and LVCMOS inputs up to 250 MHz. It features four input channels and ten configurable outputs compatible with LVDS, LVPECL, LVCMOS, CML, and HCSL. Powered by VDD at 1.8 V ±5% and VDDA at 3.3 V ±5%, it operates within a temperature range of –40 to +85 °C in a 64-QFN 9×9 mm package.

Clock Generators, PLLs, Frequency Synthesizers Feature Summary

• Generates any combination of output frequencies from any input frequency using fractional and integer synthesis modes.
• Supports hitless input clock switching between fractionally related clocks and glitchless on-the-fly output frequency changes.
• Includes in-circuit programmable non-volatile memory for known power-up configuration and status monitoring flags.

Clock Generators, PLLs, Frequency Synthesizers Applications

• OTN muxponders and transponders
• 10/40/100 G networking line cards
• GbE/10 GbE/100 GbE Synchronous Ethernet (ITU-T G.8262)
• Carrier Ethernet switches
• SONET/SDH line cards

Clock Generators, PLLs, Frequency Synthesizers Procurement Notes

Verify the specific ordering suffix against the manufacturer's current documentation to confirm factory preprogramming details. Confirm availability through authorized distributors as supply status may vary. Ensure the component meets RoHS-6 compliance requirements for your assembly process.

Clock Generators, PLLs, Frequency Synthesizers Selection Notes

Select this model when high channel count and wide frequency range are required. The Si5345A variant specifically supports fractional synthesis up to 1028 MHz. Use ClockBuilder Pro software to configure the digital loop bandwidth and output formats. Verify that the application requires the 64-QFN package footprint and 4-input architecture.

Clock Generators, PLLs, Frequency Synthesizers Part Context

This component belongs to the Si5345 family of jitter attenuators. It shares the same core DSPLL technology and package outline with the Si5344 and Si5342 variants. The primary distinction lies in the number of available output clocks, with the Si5345 offering ten outputs compared to four or two in other family members.

Clock Generators, PLLs, Frequency Synthesizers Replacement Considerations

Direct functional substitutes within the same package include other Si5345A variants with different factory preprogrammed configurations. Cross-family replacements like the Si5344 require re-evaluation of output pin counts and routing constraints.