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SI5345A-D06503-GMR is listed in the Clock Generators, PLLs, Frequency Synthesizers range at ChipApex. The manufacturer field lists Skyworks Solutions Inc.. Its product description is IC CLOCK MULTIPLIER ATTENUATOR. Review the specifications below when checking this part for your BOM.
The Skyworks SI5345A-D06503-GMR is a 10-output jitter attenuator and clock multiplier from the Si5345 Rev D family. It utilizes fourth-generation DSPLL and MultiSynth technologies to generate any frequency combination from any input source. The device supports differential inputs up to 750 MHz and LVCMOS inputs up to 250 MHz, producing outputs ranging from 100 Hz to 1028 MHz differentially or 250 MHz for LVCMOS. It achieves ultra-low jitter of 90 fs rms and meets ITU-T G.8262 SyncE requirements. The component operates on 1.8 V and 3.3 V supplies within a -40°C to +85°C temperature range.
Verify the specific ordering suffix against the manufacturer's current documentation to confirm package type and tape/reel specifications. Ensure compatibility with ClockBuilder Pro software versions for accurate configuration generation. Confirm that the factory preprogrammed part number matches the required frequency plan before procurement.
Select this model when high-frequency outputs exceeding 350 MHz are required, as it supports ranges up to 1028 MHz. Verify that the application requires both integer and fractional synthesis modes. Ensure the design accommodates the 64-QFN package dimensions and thermal requirements for the specified operating temperature range.
This component belongs to the Si5345 Rev D series, which includes variants like the Si5345B, C, and D. The 'A' designation indicates support for the full output frequency range up to 1028 MHz with integer and fractional synthesis capabilities. Other variants may be restricted to lower frequencies or integer-only modes.
Direct replacements include other Si5345A-D-xxxxx-GMR variants with different factory preprogrammed configurations. Cross-family substitution with Si5344 or Si5342 models requires verifying pinout compatibility and output count reduction.
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