SI5345D-B03956-GMR

Clock Generators, PLLs, Frequency Synthesizers Overview

The SI5345D-B03956-GMR is a factory preprogrammed clock multiplier and jitter attenuator from the Si5345 family. It features four inputs and ten outputs, supporting output frequencies up to 350 MHz with integer and fractional synthesis modes. The device utilizes fourth-generation DSPLL technology for ultra-low jitter performance of 90 fs rms. It operates on a single 1.8 V core supply and accepts differential or LVCMOS input signals ranging from 8 kHz to 750 MHz. The component is housed in a 64-QFN package and supports I2C/SPI serial interfaces.

Clock Generators, PLLs, Frequency Synthesizers Feature Summary

• Generates any combination of output frequencies from any input frequency using fourth-generation DSPLL technology
• Supports hitless input clock switching between fractionally related sources
• Includes programmable jitter attenuation bandwidth and fastlock feature for rapid lock acquisition
• Features in-circuit programmable non-volatile memory for known power-up configuration

Clock Generators, PLLs, Frequency Synthesizers Applications

• OTN muxponders and transponders
• 10/40/100 G networking line cards
• GbE/10 GbE/100 GbE Synchronous Ethernet (ITU-T G.8262)
• Carrier Ethernet switches
• SONET/SDH line cards

Clock Generators, PLLs, Frequency Synthesizers Procurement Notes

Verify the specific factory preprogrammed configuration associated with the B03956 suffix against the target design requirements. Confirm that the 350 MHz maximum output frequency aligns with system needs. Ensure the 64-QFN package footprint matches the PCB layout. Check RoHS compliance status if required by local regulations.

Clock Generators, PLLs, Frequency Synthesizers Selection Notes

Select this part when low jitter performance below 350 MHz is critical. The Si5345D variant specifically limits output frequency to 350 MHz, distinguishing it from the A/C variants which support up to 1028 MHz. Use ClockBuilder Pro software to verify the preprogrammed settings match the application's frequency plan before procurement.

Clock Generators, PLLs, Frequency Synthesizers Part Context

This component belongs to the Si5345 Rev D family, which integrates MultiSynth dividers and a DSPLL loop filter on-chip. The Si5345 model specifically provides four inputs and ten outputs in a 9x9 mm QFN package. The 'B' designation indicates the 350 MHz output frequency limit, while 'D' denotes the Rev D silicon revision.

Clock Generators, PLLs, Frequency Synthesizers Replacement Considerations

SI5345B-D-GM: Generic version of the same family with identical electrical specifications but without factory preprogramming.

Clock Generators, PLLs, Frequency Synthesizers FAQ

What is the maximum output frequency for the Si5345D variant?

The maximum output frequency for the Si5345D variant is 350 MHz.

Does the SI5345D-B03956-GMR support fractional synthesis?

Yes, the Si5345D supports both integer and fractional frequency synthesis modes.

How is the device configured upon power-up?

The device powers up with a known frequency configuration stored in its in-circuit programmable non-volatile memory (NVM).