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SI5347D-D-GM is listed in the Clock Generators, PLLs, Frequency Synthesizers range at ChipApex. The manufacturer field lists Skyworks Solutions Inc.. Its product description is IC CLK BUFFER PLL. Review the specifications below when checking this part for your BOM.
The SI5347D-D-GM is a jitter-attenuating clock multiplier featuring four independent DSPLLs in a 64-QFN package. It supports up to eight outputs with frequencies ranging from 0.0001 MHz to 350 MHz. Input frequency ranges include differential (8 kHz to 750 MHz) and LVCMOS (8 kHz to 250 MHz). The device operates on a core voltage of 1.8 V ±5% and an analog supply of 3.3 V ±5%. It achieves ultra-low jitter performance, typically 95 fs rms between 12 kHz and 20 MHz. Operating temperature spans from -40 °C to +85 °C.
Verify the specific ordering suffix against the manufacturer's current datasheet to confirm output frequency limits and package type. Ensure compatibility with the required serial interface configuration and non-volatile memory programming requirements before finalizing procurement.
Select this component when multiple independent low-jitter clock domains are required from various input sources. The Si5347D variant specifically targets applications requiring output frequencies up to 350 MHz. Utilize ClockBuilder Pro software to configure the DSPLL parameters and generate the necessary factory pre-programmed configuration files.
This part belongs to the Si5347/46 Rev D family of Dual/Quad DSPLL Any-Frequency Jitter Attenuators. The Si5347 series offers quad DSPLL capabilities in a 64-QFN package, while the Si5346 provides a dual DSPLL option in a smaller 44-QFN form factor. Both share similar functional architectures but differ in pin count and output capacity.
Si5347A-D-GM: Supports higher output frequencies up to 720 MHz.
The device provides an ultra-low jitter performance of 95 fs rms within the frequency range of 12 kHz to 20 MHz.
The DSPLLs automatically enter Holdover Mode using stored historical frequency data if the selected input clock becomes invalid, ensuring continuous operation until a valid input is restored.
Yes, it supports hitless switching for frequency-locked inputs and glitchless switching for inputs with slight frequency differences, preventing runt pulses at the output.
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