Clock Generators, PLLs, Frequency Synthesizers SI5348B-D08039-GMR product image

SI5348B-D08039-GMR

$24.16
  • Description:IC NETWORK SYNCH/JITTER 64QFN
  • Series:-

SKU:1174a465d528 Category: Brand:

  
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SI5348B-D08039-GMR is listed in the Clock Generators, PLLs, Frequency Synthesizers range at ChipApex. The manufacturer field lists Skyworks Solutions Inc.. Its product description is IC NETWORK SYNCH/JITTER 64QFN. Review the specifications below when checking this part for your BOM.

Clock Generators, PLLs, Frequency Synthesizers specifications for SI5348B-D08039-GMR

  • Description:IC NETWORK SYNCH/JITTER 64QFN
  • Series:-
  • Package:Tape & Reel (TR)
  • Mfr:Skyworks Solutions Inc.
  • PLL:Yes
  • Input:LVCMOS, LVDS, LVPECL
  • Output:CML, HCSL, LVCMOS, LVDS, LVPECL
  • Number of Circuits:1
  • Ratio - Input:Output:5:07
  • Differential - Input:Output:Yes/Yes
  • Frequency - Max:350MHz
  • Divider/Multiplier:Yes/No
  • Voltage - Supply:1.71V ~ 1.89V, 3.14V ~ 3.47V
  • Operating Temperature:-40°C ~ 85°C
  • Mounting Type:Surface Mount
  • Package / Case:64-VFQFN Exposed Pad
  • Supplier Device Package:64-QFN (9x9)
  • Type:-

Clock Generators, PLLs, Frequency Synthesizers datasheet and documents for SI5348B-D08039-GMR

SI5348B-D08039-GMR

Clock Generators, PLLs, Frequency Synthesizers Overview

The SI5348B-D08039-GMR is a network synchronizer and jitter cleaner from the Si5348 family, manufactured by Skyworks Solutions Inc. It integrates three independent DSPLLs within a single monolithic IC to support flexible SyncE, IEEE 1588, and SETS architectures. The device features ultra-low jitter of 100 fs typ (12 kHz to 20 MHz) and supports input frequencies up to 750 MHz for differential clocks. Output frequencies range from 1 PPS to 718.5 MHz for differential outputs and up to 250 MHz for LVCMOS. It operates on a core voltage of 1.8 V ±5% and an analog supply of 3.3 V ±5%, housed in a 64-lead 9x9 QFN package with an operating temperature range of –40 to +85 °C.

Clock Generators, PLLs, Frequency Synthesizers Feature Summary

  • Three independent DSPLLs supporting flexible SyncE/IEEE 1588 and SETS architectures
  • Ultra-low jitter performance of 100 fs typ (12 kHz to 20 MHz)
  • Digitally controlled oscillator (DCO) mode for precise timing adjustment
  • Programmable jitter attenuation bandwidth per DSPLL

Clock Generators, PLLs, Frequency Synthesizers Applications

  • Synchronous Ethernet (SyncE) ITU-T G.8262 EEC Option 1 & 2
  • Telecom Boundary Clock (T-BC) as defined by ITU-T G.8273.2
  • IEEE 1588 (PTP) slave clock synchronization
  • Stratum 3/3E, G.812, G.813 network synchronization

Clock Generators, PLLs, Frequency Synthesizers Procurement Notes

Verify the specific ordering suffix 'GMR' indicates tape and reel packaging rather than tray. Confirm that the numerical sequence 'D08039' corresponds to the intended factory pre-programmed configuration. Ensure compatibility with the required serial interface protocol (I2C or SPI) and check for any RoHS compliance documentation updates prior to final procurement.

Clock Generators, PLLs, Frequency Synthesizers Selection Notes

Select this model when high-frequency synthesis flexibility and ultra-low jitter are required for telecom boundary clocks or wireless backhaul. The B-grade designation supports output frequencies up to 718.5 MHz, suitable for demanding data center switch applications. Verify that the external reference input requirements align with the system's TCXO or OCXO availability for optimal holdover stability.

Clock Generators, PLLs, Frequency Synthesizers Part Context

The SI5348B-D08039-GMR belongs to the Si5348 series of network synchronizers. It shares the same functional architecture as other Si5348 variants but differs in maximum output frequency capabilities and specific factory programming. The 'B' grade offers higher output frequency ranges compared to the 'A' grade, making it suitable for more advanced synchronization standards.

Clock Generators, PLLs, Frequency Synthesizers Replacement Considerations

SI5348B-Dxxxxx-GM (Tray version)

Clock Generators, PLLs, Frequency Synthesizers FAQ

What determines the frequency accuracy and stability during free-run and holdover modes?

The external reference clock connected to the REF/REFb pins determines the frequency accuracy and stability during free-run and holdover modes.

Can the DSPLLs be configured independently?

Yes, each of the three DSPLLs can be individually configured and controlled through the serial interface, supporting different modes such as SyncE PLL, IEEE 1588 DCO, or general-purpose PLL.

What is the purpose of the DCO mode?

The Digitally Controlled Oscillator (DCO) mode provides precise timing adjustment for IEEE 1588 (PTP) clock steering applications, allowing frequency adjustments via serial interface or pin controls.

SI5348B-D08039-GMRSI5348B-D08039-GMR
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