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SI5350A-B06181-GT is listed in the Clock Generators, PLLs, Frequency Synthesizers range at ChipApex. The manufacturer field lists Skyworks Solutions Inc.. Its product description is IC ANY FREQ ANY OUT XTAL 10MSOP. Review the specifications below when checking this part for your BOM.
The Skyworks SI5350A-B06181-GT is a factory-programmable CMOS clock generator housed in a 10-MSOP package with three outputs. It utilizes a PLL and MultiSynth architecture to generate frequencies from 2.5 kHz to 200 MHz with 0 ppm error using a 25 or 27 MHz crystal reference. The device supports glitchless frequency changes, configurable spread spectrum, and static phase offset. Core and output supplies operate at 1.8 V, 2.5 V, or 3.3 V independently. Typical power consumption is 25 mA for the core.
Verify the specific factory-programmed configuration associated with the B06181 suffix against system requirements. Confirm that the 10-MSOP package provides the necessary number of outputs. Ensure the design accommodates the required crystal load capacitance and supply voltage levels for both core and output domains.
Select this component when pin-controlled configuration is preferred over I2C programming. Verify that the application requires only three outputs, as other variants offer four or eight channels. Check if the specific frequency plan exceeds the limit of two unique frequencies above 112.5 MHz simultaneously.
This part belongs to the Si5350 family of factory-programmable clock generators. It serves as a replacement for multiple discrete crystals and oscillators in cost-sensitive designs. The 'A' variant specifically supports crystal inputs only, distinguishing it from 'B' and 'C' versions that support additional input types.
SI5350A-Bxxxxx-GM (8-output version)
No, only two unique frequencies above 112.5 MHz can be simultaneously output. Multiple copies of the same high frequency can be distributed across different pins.
The maximum drive level for the crystal is 100 µW.
Spread spectrum can be enabled or disabled on any output using PLLA via an optional Spread Spectrum Enable (SSEN) pin.
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