SI5391P-A-GM

Clock Generators, PLLs, Frequency Synthesizers Overview

The Skyworks SI5391P-A-GM is a precision-calibrated, ultra-low-jitter clock generator featuring 12 differential outputs and a 64-pin QFN package. It supports input frequencies from 48 MHz crystals or up to 750 MHz differential clocks, generating output frequencies up to 1028 MHz. The device delivers 69 fs RMS phase jitter performance optimized for high-speed serial applications. Operating on 1.8 V and 3.3 V supplies within a -40°C to +85°C range, it integrates MultiSynth fractional synthesizer technology and in-circuit programmable non-volatile memory.

Clock Generators, PLLs, Frequency Synthesizers Feature Summary

• Precision calibration technology eliminates linearity errors to achieve ultra-low jitter performance below 100 fs RMS.
• Supports up to three distinct clock domains with specific frequency sets including 156.25 MHz, 312.5 MHz, and 625 MHz.
• Features highly configurable output drivers compatible with LVDS, LVPECL, LVCMOS, CML, and HCSL formats.

Clock Generators, PLLs, Frequency Synthesizers Applications

• 56G/112G PAM4 SerDes reference clocks
• 100/200/400G Ethernet switches
• Clock tree generation replacing XOs, buffers, and signal format translators

Clock Generators, PLLs, Frequency Synthesizers Procurement Notes

Verify the exact ordering part number against the manufacturer's current datasheet revision before procurement. Confirm that the application strictly utilizes a 48 MHz crystal input, as alternative reference sources are not supported for this grade. Ensure ClockBuilder Pro software configuration matches the required factory pre-programmed settings if applicable.

Clock Generators, PLLs, Frequency Synthesizers Selection Notes

Select this component only when sub-100 fs RMS jitter is mandatory for 56G/112G PAM4 applications. The device requires a 48 MHz external crystal; designs needing other crystal frequencies must utilize Si5391A/B/C/D grades instead. Verify that the system architecture can accommodate the specific domain restrictions of the Precision Calibration grade.

Clock Generators, PLLs, Frequency Synthesizers Part Context

This device belongs to the Si5391 family of any-frequency, any-output clock generators. The 'P' suffix denotes the Precision Calibration grade, which offers superior jitter performance compared to standard integer or fractional modes found in A, B, C, or D grades. It replaces multiple discrete oscillators and buffers with a single integrated solution.

Clock Generators, PLLs, Frequency Synthesizers Replacement Considerations

Si5391A-A-GM

Clock Generators, PLLs, Frequency Synthesizers FAQ

What is the maximum RMS phase jitter performance of the SI5391P-A-GM?

The device achieves an RMS phase jitter of 69 fs through precision calibration technology.

Can the SI5391P-A-GM accept an external clock input instead of a crystal?

No, the Precision Calibration Grade P option is restricted to a 48 MHz crystal input at the XA/XB pins.

How many independent clock domains does the SI5391P support?

It supports up to three clock domains with specific frequency sets such as 156.25 MHz, 312.5 MHz, and 625 MHz.