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— IC芯片 | 连接器 | 传感器 | 被动器件 —
The Infineon SLE 4428 C is an intelligent 1-Kbit EEPROM designed for smart card applications, featuring a serial three-wire interface compliant with ISO standard 7816. It organizes memory as 1024 x 8 bits with irreversible byte-wise write protection and includes a 1024 x 1-bit protection memory. The device requires a 5 V supply (4.5–5.5 V) and operates within a temperature range of -35 °C to +100 °C. Key features include programmable security code verification, error counting for access control, and data retention of at least ten years with minimum 10^4 write/erase cycles.
Verify the specific ordering suffix and package type (Chip or M2.2 Wire-Bonded Module) against current Siemens/Infineon documentation, as availability may vary. Confirm that the required license for smart card application usage from Innovatron Patents is secured prior to implementation. Ensure supply voltage and clock frequency parameters match system requirements.
Select the SLE 4428 C over the SLE 4418 when programmable security code verification and user identification are required. The SLE 4428 adds PSC logic and error counting capabilities not present in the base model. Consider the M2.2 module form factor if embedding directly into plastic cards is necessary, otherwise use the chip die for custom packaging.
The SLE 4428 is part of the SLE 44xx series of intelligent EEPROMs originally published by Siemens Aktiengesellschaft. It shares the core memory architecture and interface with the SLE 4418 but distinguishes itself through enhanced security features. The component is designed for synchronous transmission environments typical of contact-based smart card standards.
Publicly confirmed substitute part numbers are not available in the provided datasheet. Cross-referencing should be performed carefully due to the proprietary nature of the security logic and potential licensing restrictions associated with smart card implementations.
After eight successive incorrect PSC entries, the error counter blocks any subsequent attempts at PSC verification, thereby preventing further writing or erasing of the memory until the counter is reset.
The maximum clock frequency is 20 kHz, as specified in the DC characteristics for both read and write operations.
No, the protect bits are one-time programmable and cannot be erased once written, providing irreversible byte-wise write protection.