SM802124UMG

Clock Generators, PLLs, Frequency Synthesizers Overview

The SM802124UMG is a ClockWorks™ dual 125MHz ultra-low jitter CMOS frequency synthesizer manufactured by Microchip Technology. It utilizes the patented RotaryWave architecture to generate two LVCMOS clock outputs at 125MHz from a single 15MHz LVCMOS reference input. The device operates within a supply voltage range of 2.375V to 3.465V and supports an industrial temperature range of –40°C to +85°C. Key electrical specifications include a typical RMS phase jitter of 85fs (1.875MHz to 20MHz integration range), a PLL lock time of 20ms, and a maximum output duty cycle deviation of ±5%.

Clock Generators, PLLs, Frequency Synthesizers Feature Summary

• Generates two differential-equivalent LVCMOS outputs at 125MHz with one output phase-shifted by 180 degrees.
• Features extremely low phase noise via RotaryWave architecture, achieving 85fs typical RMS jitter (1.875MHz–20MHz).
• Operates on a single 2.5V or 3.3V power supply with a total supply current of approximately 90mA.
• Includes a PLL bypass pin (PLL_BYPASS) to select between normal PLL operation and direct reference clock output.

Clock Generators, PLLs, Frequency Synthesizers Applications

• Gigabit Ethernet timing solutions
• Low-jitter clock distribution systems
• Network equipment requiring precise 125MHz references

Clock Generators, PLLs, Frequency Synthesizers Procurement Notes

Verify that the specific part number matches the required packaging format. The datasheet lists SM802124UMG for tube shipping and SM802124UMGTR for tape and reel. Confirm RoHS compliance status as devices are noted as Green, RoHS, and PFOS compliant. Ensure the operating environment stays within the specified -40°C to +85°C industrial temperature range.

Clock Generators, PLLs, Frequency Synthesizers Selection Notes

Select this component when a fixed 125MHz dual-output solution is required without programmable registers. It accepts a standard 15MHz LVCMOS input. Designers must account for a 20ms PLL lock time during startup. Thermal management should consider a junction-to-board thermal resistance (ψJB) of 30°C/W, assuming the exposed pad is soldered to the PCB ground plane.

Clock Generators, PLLs, Frequency Synthesizers Part Context

The SM802124 belongs to the ClockWorks family originally developed by Micrel, which was acquired by Microchip Technology. This specific model provides a fixed-frequency synthesis solution, contrasting with other models in the series that may offer programmable frequencies or different output formats like LVPECL.

Clock Generators, PLLs, Frequency Synthesizers Replacement Considerations

The SM802124UMG-TR serves as the tape-and-reel equivalent of the tube-packaged SM802124UMG. Other members of the ClockWorks family may offer different output counts or frequencies but require verification of pin compatibility and electrical characteristics before substitution.

Clock Generators, PLLs, Frequency Synthesizers FAQ

What is the function of the PLL_BYPASS pin?

The PLL_BYPASS pin allows the user to select the output source. When set to logic high, the outputs are driven directly by the REF_IN signal; when low, the device operates in normal PLL mode to synthesize the 125MHz clocks.

How does the device handle the unused pins?

Pins 3, 4, 16, 20, 23, and 24 are designated as No Connection (NC) and should not be connected to anything. Pins 7, 10, 11, 12, 15, and 19 are factory test pins and also must remain unconnected.

What is the expected RMS phase jitter performance?

The typical RMS phase jitter is 85fs when integrating between 1.875MHz and 20MHz. In the wider range of 12kHz to 20MHz, the typical value is 320fs. Performance tracks the input source phase noise up to approximately 1MHz offset.