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TE0713-01-200-2C is listed in the Microcontrollers, Microprocessor, FPGA Modules range at ChipApex. The manufacturer field lists Trenz Electronic GmbH. Its product description is IC MOD ARTIX7 A200T 200MHZ 1GB. Review the specifications below when checking this part for your BOM.
The Trenz Electronic TE0713-01-200-2C is an industrial-grade System-on-Module (SoM) featuring the Xilinx Artix-7 XC7A200T-2FBG484C FPGA. It integrates 1 GByte of DDR3L SDRAM, a 32 MByte Quad SPI Flash memory, and an FTDI FT600Q USB 3.0-to-FIFO bridge. The module operates within a commercial temperature range of 0°C to +70°C and utilizes three Samtec Razor Beam connectors for board-to-board interfacing. Power is supplied via a single 3.3V input with on-board DC-DC converters managing internal voltage rails.
Verify that the specific ordering suffix corresponds to the XC7A200T-2FBG484C device variant. Confirm the required operating temperature range matches the commercial grade specification (0°C to +70°C). Ensure baseboard design supports the specified 3.3V power supply requirements and connector mating heights.
Select this module when a high-density Artix-7 FPGA with integrated high-speed USB 3.0 connectivity is required. The 1 GByte DDR3L capacity supports complex data buffering applications. Verify that the baseboard can accommodate the 50 mm x 40 mm form factor and provides the necessary I/O voltage levels for VCCIO13, VCCIO15, and VCCIO16 banks.
This part belongs to the Trenz Electronic TE0713 series of 4x5 cm SoMs. It shares mechanical compatibility with other modules in the family but differs in FPGA density and speed grade. The '200' designation indicates the Artix-7 200T device, while '2C' denotes the commercial temperature grade.
Publicly confirmed substitute part numbers are not available in the provided documentation. Alternative selection requires evaluating other TE0713 variants or different manufacturer SoMs based on FPGA density and pin compatibility.
The Quad Enable (QE) bit is set to high at the manufacturing plant by default, allowing the FPGA to load its configuration from flash during power-on.
JTAG access is controlled by the JTAGEN pin on B2B connector JM1. A low signal selects the Artix-7 FPGA, while a high signal selects the System Controller CPLD.
A single 3.3V power supply with a minimum current capability of 3A is recommended for both VIN and 3.3VIN rails to achieve highest efficiency. Split 5V/3.3V supplies are supported but may increase power consumption.
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