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The TIS75 is an N-channel general-purpose JFET in a TO-92 package. It features a drain-gate voltage of 30 V and gate-source voltage of -30 V. The zero-gate voltage drain current ranges from 8 to 80 mA, with a maximum gate-source cutoff voltage of -4.0 V. Input capacitance is 18 pF at 1.0 MHz. Total device dissipation is 350 mW, with thermal resistance junction-to-ambient at 357 °C/W. Operating temperature spans -55°C to +150°C.
Verify the manufacturer origin, as Fairchild Semiconductor was acquired by onsemi. Confirm the specific datasheet revision matches the required design specifications. Ensure the TO-92 package dimensions align with the target PCB footprint. Check for RoHS compliance status if environmental regulations apply to the final assembly.
Select this component for low-power analog signal routing where minimal leakage is critical. The TO-92 package limits power dissipation to 350 mW, requiring careful thermal management. Verify that the -4.0 V maximum cutoff voltage fits the control logic levels. Consider input capacitance values when designing high-frequency signal paths.
The TIS75 is an N-channel Junction Field Effect Transistor (JFET) manufactured originally by Fairchild Semiconductor. It belongs to the family of small-signal silicon devices intended for general-purpose amplification and switching tasks. The component utilizes a standard three-terminal configuration within a plastic encapsulated outline.
TIS75J18Z
The maximum gate-source cutoff voltage (VGS(off)) is -4.0 V under test conditions of VDS = 20V and ID = 4.0nA.
The typical rise time (tr) is 10 ns, measured with VGS(off) = -4.0V, VGS(on) = 0, ID = 5.0mA, and VDS = 10V.
The thermal resistance from junction to ambient (RθJA) is specified as 357 °C/W.