TS88915TMW70

Application Specific Clock/Timing Overview

The TS88915TMW70 is a low skew CMOS PLL clock driver manufactured by Microchip Technology (formerly Atmel). It utilizes phase-locked loop technology to distribute clock signals with minimal delay to multiple components. The device features an input frequency range from 5 MHz to 2X_Q FMAX and supports maximum operating frequencies of 70 MHz for the 2X_Q output and 35 MHz for Q0-Q4 outputs. It operates on a single 5V ± 5% supply voltage within a military temperature range (-55°C to +125°C) and is packaged in a hermetically sealed 28-lead Leaded Ceramic Chip Carrier (LDCC).

Application Specific Clock/Timing Feature Summary

• Five low skew outputs (Q0-Q4) with output-to-output skew less than 500 ps, phase locked to the SYNC input.
• Three additional outputs: 2X_Q (double system frequency), Q/2 (half system frequency), and Q5 (inverted output).
• Two selectable clock inputs (SYNC0/SYNC1) with test mode pin (PLL_EN) for low frequency testing.
• CMOS and TTL compatible outputs; all inputs are TTL-level compatible.

Application Specific Clock/Timing Applications

• Clock distribution for high-performance microprocessors such as TS68040, TSPC603E, TSPC603P, and TSPC603R.
• Synchronous clock distribution to multiple boards using a central system clock source.
• PCI bridge, RAM, and MMU clock generation and distribution.

Application Specific Clock/Timing Procurement Notes

Verify that the component meets MIL-STD-883 Class B or Atmel standard screening requirements. Confirm the package type matches the 'W' suffix for the 28-lead LDCC ceramic chip carrier. Ensure the ordering suffix indicates the 70 MHz version and the specified temperature range.

Application Specific Clock/Timing Selection Notes

Select this component when low skew clock distribution is required for high-speed digital systems. The device supports input/output ratios of 1:2, 1:1, and 2:1 via the FREQ_SEL pin. Ensure the application can accommodate the 5V power supply and the specific termination schemes required for the 2X_Q output if operating above 40 MHz.

Application Specific Clock/Timing Part Context

The TS88915T series includes variants with different package options and frequency ratings. The 'M' suffix denotes the -55°C to +125°C military temperature range, while 'V' denotes -40°C to +85°C. The 'R' suffix indicates a PGA package, whereas 'W' indicates the LDCC package used in this part number. Other versions include the TS88915TVW70 and TS88915TMR70.

Application Specific Clock/Timing Replacement Considerations

Public confirmed substitute part numbers are not available in the provided documentation. Cross-model compatibility exists within the TS88915T family regarding function, but package and temperature range differences must be verified before substitution.

Application Specific Clock/Timing FAQ

How does the TS88915T handle board testing?

The device includes tri-state functionality via the OE/RST pin. Bringing this pin low places all outputs (except LOCK) into a high impedance state, facilitating board testing without disrupting other circuitry.

What is the purpose of the 1 MΩ resistor connected to RC1?

A 1 MΩ resistor tied to either Analog VCC or Analog GND is required to prevent jitter caused by inherent PLL dead-band. This configuration injects current into the internal charge pump, creating a fixed phase offset between the SYNC input and the feedback output.

Can the TS88915T operate below 10 MHz?

Yes, the device guarantees stable phase-locked operation down to the minimum input frequency specified in Table 3 of the datasheet. However, the LOCK indicator pin may remain low at frequencies below 10 MHz due to insufficient correction pulse frequency.