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The VSP1021PFB is a monolithic analog-signal processor and digitizer designed for area charge-coupled-device (CCD) sensors. It integrates input clamp circuitry, a correlated double sampler (CDS), and a programmable-gain amplifier (PGA). The device features a 10-bit pipeline ADC operating at 25 MSPS in CCD mode and 28 MSPS in video mode. It supports single power supply operation from 2.7 V to 3.3 V with typical power consumption of 95 mW. Key specifications include full-channel differential nonlinearity error of less than ±0.5 LSB and integral nonlinearity error of less than ±1.5 LSB. The component is housed in a 48-terminal TQFP package.
Verify the marketing status before procurement as the VSP1021PFB is classified as Not Recommended For New Designs (NRND). Confirm availability through existing production channels if required for legacy support. Ensure compliance with RoHS and lead-free requirements specified in the packaging data sheet.
Select this component when interfacing directly with CCD sensors requiring integrated CDS and PGA functionality. Verify that the 2.7 V to 3.3 V single-supply voltage range aligns with the target system design. Consider the 48-pin TQFP package dimensions for PCB layout constraints and thermal management requirements.
The VSP1021PFB belongs to the VSP1021 family of analog signal processors. It is specifically engineered to maximize dynamic range and correct errors associated with CCD sensors. The device simplifies system design by combining analog processing and high-speed digitization into a single monolithic CMOS component.
Public confirmed substitute part numbers are not available in the provided documentation.