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The Microchip Technology 2N7002-G is an N-Channel Enhancement-Mode Vertical DMOS FET housed in a 3-lead SOT-23 package. It features a Drain-to-Source Breakdown Voltage (BVDSS) of 60 V and a maximum Gate-to-Source Voltage of ±30 V. The device supports an On-State Drain Current (ID(ON)) of 500 mA at VGS = 10V and maintains a maximum Static Drain-to-Source On-State Resistance (RDS(ON)) of 7.5 Ω. Operating temperatures range from -55°C to +150°C, with a power dissipation rating of 0.36 W at 25°C ambient temperature.
Verify the specific ordering suffix 'G' indicates lead-free and RoHS-compliant packaging when sourcing this component. Confirm that the media type corresponds to the standard reel quantity of 3000 units per reel for the SOT-23 package configuration. Ensure compatibility with automated surface-mount assembly processes given the small form factor.
Select this component for low-voltage, small-signal switching applications requiring fast switching speeds and low input capacitance. The vertical DMOS technology ensures excellent thermal stability and ease of paralleling for current sharing. Consider the 7.5 Ω maximum on-resistance when designing circuits where conduction losses must be minimized under full load conditions.
This part belongs to the 2N7002 series of N-Channel Enhancement-Mode Vertical DMOS FETs manufactured by Microchip Technology. It utilizes a silicon-gate manufacturing process designed to combine bipolar transistor power handling capabilities with MOS device characteristics. The device is specifically engineered for applications demanding very low threshold voltages and high breakdown voltages.
Cross-reference with other manufacturers offering the 2N7002 specification. Verify pinout compatibility (Gate, Source, Drain) and ensure equivalent electrical parameters such as BVDSS and RDS(ON) are met before substitution.
The maximum continuous drain current (ID(ON)) is 500 mA when the gate-to-source voltage is 10 V and the drain-to-source voltage is 25 V.
Yes, the device is explicitly described as being free from secondary breakdown due to its vertical DMOS structure and positive temperature coefficient.