AFS090-2QNG108

Overview

The AFS090-2QNG108 is a Fusion mixed-signal Field Programmable Gate Array manufactured by Microsemi Corporation. It features 90,000 system gates and 2,304 tiles within a QN108 package containing 108 terminals. The device operates at a maximum clock frequency of 350 MHz and utilizes an advanced 130-nm flash-based CMOS process. It includes 2 Mbits of embedded user flash memory and 1 Kbit of FlashROM. The integrated analog subsystem comprises one Analog Quad with five ADC input channels and five MOSFET gate driver outputs. The component supports mixed-voltage I/O standards ranging from 1.5 V to 3.3 V and is available in the commercial temperature range.

Feature Summary

• Integrates nonvolatile flash FPGA fabric with analog peripherals for instant-on operation without external configuration memory.
• Includes a high-resolution analog-to-digital converter with up to 30 scalable input channels and dedicated monitoring capabilities.
• Features built-in MOSFET gate drivers supporting programmable drive strengths for power management applications.
• Provides hardware security through FlashLock technology and 128-bit AES decryption via JTAG.

Applications

• Power management systems and smart battery charging circuits
• Motor control applications requiring mixed-signal processing
• Clock generation and management solutions

Procurement Notes

Verify that the ordering suffix matches the required speed grade and package type. Confirm the application temperature range aligns with the specific suffix designation. Ensure the device status corresponds to production availability rather than engineering silicon or pre-production samples. Check for RoHS compliance requirements associated with the QN package variant.

Selection Notes

Select this model when a low-density mixed-signal solution is required. The QN108 package offers a compact form factor suitable for space-constrained designs. Verify that the 90,000 system gate count meets logic resource needs. Ensure the single Analog Quad provides sufficient analog inputs and gate drivers for the target application.

Part Context

This component belongs to the Fusion family of mixed-signal FPGAs, which combines digital logic with analog functions on a single chip. The AFS090 represents the entry-level density within this series, offering 2 Mbits of flash memory. It shares architectural similarities with higher-density variants like the AFS250 and AFS600 but provides fewer I/O resources and analog channels.

Replacement Considerations

Pin-compatible alternatives within the same package include other Fusion devices such as the AFS250, provided the increased logic density is acceptable. Cross-family replacements are not directly pin-compatible due to differing architecture and I/O configurations.