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The AT17C256-10JC is a 256K-bit (262,144 x 1-bit) serial EEPROM designed for FPGA configuration. It operates at 5V nominal and supports industrial temperature ranges from -40°C to +85°C. The device utilizes a simple serial interface compatible with FPGA Master Serial Mode. Key features include in-system programmability via a 2-wire bus, cascading capability for higher-density arrays, and low-power standby mode consuming less than 150 µA.
Verify the specific suffix 'JC' corresponds to the 20-lead PLCC package and Industrial temperature range (-40°C to +85°C). Confirm that the 'C' designation indicates 5V operation rather than 3.3V LV versions. Ensure compatibility with standard industry programmers or the ATDH2200E Programming Kit for in-system programming requirements.
Select this component when a 256K-bit capacity is required for FPGA configuration. Choose the Industrial grade version if operating temperatures extend below 0°C. Consider the PLCC package only if the PCB layout accommodates 20-lead J-leaded carriers. Verify that the target FPGA supports the Master Serial Mode interface for automatic configuration loading.
This part belongs to the AT17C/LV65/128/256 family of low-density FPGA Configuration EEPROMs. The family provides cost-effective configurators available in 8-pin PDIP/SOIC and 20-lead PLCC/SOIC packages. The AT17C series specifically denotes 5V operation, while the AT17LV series covers 3.3V applications. These devices emulate Atmel's AT24CXXX serial EEPROMs during programming.
AT17LV256-10JC
Yes, the AT17C256 supports cascading. The CEO output asserts Low after the last bit is read, enabling the next device in the chain.
The reset polarity is programmable as either active High or active Low by writing to a special EEPROM byte using an industry-standard programmer.