AT17F040-30JU

Overview

The AT17F040-30JU is a 4-Mbit serial configuration flash memory designed for Field Programmable Gate Arrays (FPGAs). It operates at 3.3V with 5.0V tolerant I/O pins and supports in-system programming via a 2-wire bus. The device features fast serial download speeds up to 33MHz, low-power standby mode, and an endurance of 100,000 write cycles. It is available in a 20-lead PLCC package and supports industrial temperature ranges from -40°C to +85°C.

Feature Summary

• Designed specifically for storing configuration programs for SRAM-based FPGAs
• Supports In-System Programming (ISP) via a simple 2-wire serial bus interface
• Features page download capability allowing multiple bitstreams within a single device
• Compatible with major FPGA families including Xilinx, Altera, Atmel, and Lucent

Applications

• Configuration of Xilinx XC3000, XC4000, XC5200, Spartan, and Virtex FPGAs
• Configuration of Altera FLEX and APEX devices
• Configuration of Atmel AT40K and AT94K series devices
• Configuration of Lucent ORCA and Motorola MPA1000 FPGAs

Procurement Notes

Verify the specific ordering suffix 'JU' corresponds to the 20-lead PLCC package and industrial temperature range (-40°C to +85°C). Confirm that the manufacturer designation has transitioned from Atmel to Microchip Technology, as Atmel was acquired. Ensure compatibility with existing FPGA master serial mode requirements before procurement.

Selection Notes

Select this component when configuring SRAM-based FPGAs requiring a cost-effective, serial configuration solution. It is suitable for designs needing 4-Mbit capacity with support for cascading or paging. Consider the 20-lead PLCC package if through-hole mounting is required. Verify that the target FPGA supports the Master Serial configuration mode compatible with this configurator.

Part Context

The AT17F Series are In-System Programmable Configuration PROMs (Configurators) used to program Field Programmable Gate Arrays. The AT17F040 provides 4-Mbit storage, while the AT17F080 offers 8-Mbit. These devices utilize a low-power CMOS FLASH process and emulate Atmel AT24C serial EEPROMs for programming ease. They allow simple system reconfiguration by holding all necessary bitstream files.

Replacement Considerations

AT17F080-30JU: Offers double the density (8-Mbit) in the same package and pinout.

FAQ

How does the device handle configuration of multiple FPGAs?

Multiple AT17F devices can be cascaded in a daisy-chain configuration. The CEO output of one device drives the CE input of the next, allowing sequential data retrieval without external controllers.

What is the function of the PAGE_EN and PAGESEL pins?

These pins enable Page Download Mode, partitioning the address space into four equal pages. This allows users to store and retrieve multiple configuration bitstreams from a single device.

Can this device be programmed in-system?

Yes, the AT17F040-30JU supports In-System Programming (ISP) via a 2-wire serial bus by bringing the SER_EN pin Low during the programming process.