Configuration PROMs For FPGAs AT17LV010-10JI product image

AT17LV010-10JI

  • Description:IC SRL CONFIG EEPROM 1M 20-PLCC
  • Series:-
  • Mfr:Microchip Technology
  • Package:Tube

SKU:931f69c8faa7 Category: Brand:

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AT17LV010-10JI is listed in the Configuration PROMs For FPGAs range at ChipApex. The manufacturer field lists Microchip Technology. Its product description is IC SRL CONFIG EEPROM 1M 20-PLCC. Review the specifications below when checking this part for your BOM.

Configuration PROMs For FPGAs specifications for AT17LV010-10JI

  • Description:IC SRL CONFIG EEPROM 1M 20-PLCC
  • Series:-
  • Mfr:Microchip Technology
  • Package:Tube
  • Programmable Type:Serial EEPROM
  • Memory Size:1Mb
  • Voltage - Supply:3V ~ 3.6V, 4.5V ~ 5.5V
  • Operating Temperature:-40°C ~ 85°C
  • Mounting Type:Surface Mount
  • Package / Case:20-LCC (J-Lead)
  • Supplier Device Package:20-PLCC (9x9)

Configuration PROMs For FPGAs datasheet and documents for AT17LV010-10JI

AT17LV010-10JI

Configuration PROMs For FPGAs Overview

The AT17LV010-10JI is a 1-Mbit (1,048,576-bit) serial EEPROM designed for FPGA configuration. It operates at 10 MHz and supports both 3.3V and 5.0V supply voltages within the industrial temperature range of -40°C to +85°C. The device utilizes a simple two-wire serial interface for in-system programming and direct connection to SRAM-based FPGAs. It features programmable reset polarity, write protection mechanisms, and cascading capabilities via the CEO output pin.

Configuration PROMs For FPGAs Feature Summary

  • Supports In-System Programming (ISP) via a two-wire bus
  • Enables cascaded configurations through the Chip Enable Output (CEO)
  • Allows user-programmable reset polarity settings
  • Provides write protection during programming operations

Configuration PROMs For FPGAs Applications

  • Configuration memory for Xilinx XC3000, XC4000, and Spartan FPGAs
  • Configuration memory for Altera FLEX and APEX devices
  • Configuration memory for Atmel AT40K and AT94K devices
  • Daisy-chain configuration setups requiring expanded memory density

Configuration PROMs For FPGAs Procurement Notes

Verify that the ordering suffix 'JI' corresponds to the 20-lead PLCC package and Industrial temperature rating (-40°C to +85°C). Confirm compatibility with the specific FPGA family intended for configuration, as pinouts vary between device sizes within the series. Ensure the design accounts for the required decoupling capacitor between VCC and GND.

Configuration PROMs For FPGAs Selection Notes

Select this part when a 1-Mbit capacity is required for FPGA configuration in industrial environments. The 20-lead PLCC package is suitable for applications where surface mount SOIC options are unavailable for this specific memory size. Consider the cascading capability if multiple FPGAs need to be configured from a single chain.

Configuration PROMs For FPGAs Part Context

This component belongs to the AT17LV series of FPGA Configuration EE PROMs. These devices provide cost-effective configuration solutions for various SRAM-based FPGAs. The series includes capacities ranging from 65-Kbit to 4-Mbit, with the AT17LV010 representing the 1-Mbit tier. It is compatible with industry-standard programmers and supports both commercial and industrial voltage ranges.

Configuration PROMs For FPGAs Replacement Considerations

Customers using older -10SC or -10SI packages may migrate to the AT17LVXXX-10SU variant.

AT17LV010-10JIAT17LV010-10JI

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