BSZ0910NDXTMA1

Overview

The BSZ0910ND is a dual N-channel OptiMOS PowerStage MOSFET in PG-WISON-8 packaging. It features a 30 V drain-source voltage and a maximum on-state resistance of 9.5 mΩ at VGS=10 V. The continuous drain current reaches 25 A at TC=25°C, with a pulsed current capability of 40 A. Total gate charge is 4.0 nC at VGS=4.5 V and 8.2 nC at VGS=10 V. Thermal resistance from junction to case is 4 °C/W, while junction-to-ambient resistance is 65 °C/W on a standard PCB.

Feature Summary

• Dual N-channel configuration integrating two enhancement-mode transistors within a single compact package for high-side and low-side switching applications.
• Logic-level rated operation optimized for efficient drive directly from 4.5 V logic sources without requiring additional level-shifting circuitry.
• Avalanche-rated construction designed to withstand repetitive unclamped inductive switching events and transient energy stresses.

Applications

• Synchronous buck converter power stages
• Motor driver half-bridge configurations
• DC-DC converter output stages

Procurement Notes

Verify the specific ordering code suffix against the manufacturer's official documentation to ensure correct tape-and-reel specifications and marking codes. Confirm that the component meets all required environmental standards, including RoHS compliance and halogen-free requirements as defined in the datasheet. Cross-reference the package outline dimensions with your PCB footprint library before finalizing procurement orders.

Selection Notes

Select this component when designing circuits requiring integrated dual switches in a minimal footprint. The low gate charge values support high-frequency switching operations. Ensure thermal management strategies account for the specified junction-to-ambient resistance values under your specific PCB copper area constraints.

Part Context

This device belongs to Infineon's PowerStage 3x3 series, which combines complementary or identical MOSFETs into a single surface-mount package. This integration reduces board space and simplifies layout by minimizing parasitic inductances between the high-side and low-side switches compared to discrete implementations.

Replacement Considerations

BSZ0909ND