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The CMLDM7003G TR is a surface-mount dual N-channel enhancement-mode silicon MOSFET manufactured by Central Semiconductor Corp. It utilizes an N-Channel DMOS process and features the USA pinout configuration within an SOT-563 package. The device provides a drain-source voltage of 50 V, continuous drain current of 280 mA, and power dissipation up to 350 mW on specific board configurations. Electrical characteristics include a maximum rDS(ON) of 3.0 Ω at VGS=1.8V and gate charge (Qg) of 0.764 nC at VGS=4.5V. Operating junction temperature ranges from -65°C to +150°C.
Verify the ordering suffix matches the required plating specification. The 'TR' designation indicates tape and reel packaging. Confirm the 'G' suffix aligns with halogen-free requirements. Ensure the USA pinout configuration is compatible with the target PCB footprint. Cross-reference the datasheet revision date against manufacturing batches for accuracy.
Select this component when a dual N-channel MOSFET in an SOT-563 package is required. The USA pinout differs from the Japanese variant; verify pin assignments before integration. Consider the 3.0 Ω maximum rDS(ON) for low-current applications. Evaluate thermal resistance values based on the specific copper pad area used in the design.
This part belongs to the CMLDM7003 series of surface-mount dual N-channel enhancement-mode MOSFETs. The 'G' suffix denotes a halogen-free version, while the 'J' suffix indicates a Japanese pinout configuration. All variants share identical electrical specifications but differ in lead arrangement and environmental compliance markings.
The CMLDM7003J serves as a functional substitute if the Japanese pinout configuration is acceptable. Verify that the alternative device maintains compatibility with the existing PCB land pattern and signal routing constraints.