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The CP226V-2N4393 is a silicon N-channel JFET bare die designed for analog switching and chopper applications. It features a 20 x 17 mil die size with 3.2 x 3.2 mil bonding pads. Key electrical parameters include a gate-source breakdown voltage of 40 V, a drain-source saturation current range of 5.0 to 30 mA, and an off-state drain current below 0.1 nA at 5.0 V gate bias. The device operates within a junction temperature range of -65°C to +150°C.
Verify the specific packaging suffix required for your assembly process. Options include unsawn wafers (WN), sawn wafers on plastic rings (WR), or singulated die in waffle trays (CT). The CM suffix indicates 100% visual inspection per MIL-STD-750 methods. Confirm plating requirements, such as Tin/Lead or PbFree, when placing orders to ensure compliance with project specifications.
Select this component for designs requiring a discrete JFET die rather than packaged transistors. Ensure the application supports wire bonding to the specified 3.2 x 3.2 mil pads. Verify that the system can handle the maximum ratings, including the 40 V gate-drain voltage and 50 mA gate current limits during transient conditions.
This part corresponds to the standard 2N4393 N-channel JFET specification but is supplied as a bare die by Central Semiconductor Corp. It shares functional similarities with Interfet's 2N4393 series but differs in physical form factor. It is intended for custom hybrid microelectronics or specialized semiconductor packaging processes.
Direct replacement requires matching the die dimensions and electrical characteristics of the original 2N4393 specification. Packaged equivalents like the TO-18 2N4393 are not direct substitutes due to package differences. Verify compatibility with existing wire bonding equipment and substrate materials.