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DP8390DV is listed in the Controllers range at ChipApex. The manufacturer field lists Texas Instruments. Its product description is IC CTRLR NETWORK IN (NIC)68PLCC. Review the specifications below when checking this part for your BOM.
The DP8390DV is a Network Interface Controller (NIC) designed for CSMA/CD local area networks, including Ethernet and Thin Ethernet. It implements IEEE 802.3 MAC layer functions with dual 16-bit DMA channels and a 16-byte internal FIFO. The device interfaces with 8-, 16-, or 32-bit microprocessor systems using a single 5V supply. Key capabilities include physical, multicast, and broadcast address filtering, three levels of loopback diagnostics, and network statistics storage.
Verify component authenticity through official manufacturer channels or authorized distributors. Confirm package type matches the required DIP configuration. Check for obsolete status indicators as this part may be discontinued. Ensure compatibility with existing system bus timing requirements before procurement.
Select this component for systems requiring standalone IEEE 802.3 MAC functionality without external arbitration logic. Pair with DP8391 Serial Network Interface and DP8392 Coaxial Transceiver Interface for a complete three-chip solution. Evaluate memory buffer ring sizing based on expected network load and packet sizes.
This device belongs to the DP8390 family of Network Interface Controllers. It serves as the central MAC processor in a three-chip set that includes the DP8391 SNI and DP8392 CTI. The DP8390D variant specifically denotes the plastic chip carrier or DIP package options available within this product line.
DP8390DN
It filters multicast addresses using a standard hashing algorithm that maps all multicast addresses into a 6-bit value. This value indexes a 64-bit array in the Multicast Address Register Array to determine acceptance.
The Receive Buffer Ring consists of contiguous fixed-length 256-byte buffers used by the Local DMA channel to store received packets. It manages buffer linking for long packets and prevents overwriting unread data via a Boundary Pointer.
Yes, the Local DMA and Remote DMA operations can be interleaved. The Local DMA has highest priority for internal FIFO transfers, while the Remote DMA handles transfers between buffer memory and host system memory.
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