NE34018-T1-A

Overview

The NE34018-T1-A is a GaAs Hetero-Junction FET in an SOT-343 package. It operates as a low noise amplifier transistor in the 1-3 GHz range. Key electrical parameters include a typical noise figure of 0.6 dB and associated gain of 16.0 dB at 2 GHz with VDS=2V, IDS=5mA. The device supports saturated drain currents (IDSS) from 30 to 120 mA. Absolute maximum ratings specify a drain-source voltage of 4 V, gate voltages of -3 V, channel temperature up to 125°C, and total power dissipation of 150 mW.

Feature Summary

• Utilizes ion implantation fabrication for improved RF performance and uniformity
• Designed for low noise amplification in L-band and S-band frequencies
• Housed in a miniature plastic surface mount package

Applications

• GPS receiver front ends
• PCS communication systems
• WLAN infrastructure
• MMDS applications

Procurement Notes

Verify the specific IDSS binning code required for the design, as the T1 suffix indicates tape and reel packaging but does not define the current range. Confirm that the V63 or V64 marking matches the selected component lot. Ensure the supplier provides documentation confirming the SOT-343 outline dimensions match the target PCB footprint.

Selection Notes

Select this component when minimizing noise figure is critical within the 1-3 GHz spectrum. Evaluate bias conditions carefully, as gain and noise vary significantly between 2V/5mA and 3V/20mA operating points. Consider the thermal resistance of 833 C/W when designing heat dissipation strategies for dense layouts.

Part Context

Originally manufactured by California Eastern Laboratories (CEL), this part represents a legacy NEC RF semiconductor product line. The device is a discrete GaAs HJ-FET intended for integration into custom amplifier stages rather than functioning as a complete integrated circuit module.

Replacement Considerations

Public confirmed substitute part numbers are not available in the provided datasheet.

FAQ

What is the pin configuration for the SOT-343 package?

Pin 1 is Source, Pin 2 is Gate, Pin 3 is Source, and Pin 4 is Drain.

How does the noise figure change with frequency?

At VDS=2V and IDS=10mA, the noise figure increases from 0.56 dB at 900 MHz to 0.70 dB at 3000 MHz.

What is the maximum allowable total power dissipation?

The absolute maximum rating for total power dissipation is 150 mW at an ambient temperature of 25°C.