NTMFD4C87NT1G

Overview

The NTMFD4C87NT1G is a PowerPhase dual N-channel MOSFET in an SO8FL (DFN8) package. It integrates a high-side FET (Q1) and a low-side FET (Q2). Q1 offers a maximum RDS(on) of 5.4 mΩ at VGS=10V and 8.1 mΩ at VGS=4.5V, with a continuous drain current of 15.4 A at 25°C. Q2 provides a maximum RDS(on) of 3.1 mΩ at VGS=10V and 4.3 mΩ at VGS=4.5V, supporting 19.5 A continuous current at 25°C. Both devices feature a 30 V drain-source breakdown voltage and operate within a junction temperature range of -55°C to +150°C.

Feature Summary

• Co-packaged power stage solution designed to minimize board space and parasitic inductances.
• Optimized device architecture to reduce conduction and switching power losses.
• Compliant with RoHS standards and free from lead, halogens, and brominated flame retardants.

Applications

• DC-DC Converters
• System Voltage Rails
• Point of Load

Procurement Notes

Verify the specific ordering suffix against official documentation to confirm packaging quantity and tape-and-reel specifications. Ensure the component meets required environmental compliance standards such as RoHS and REACH before integration into final assemblies.

Selection Notes

Select this component for applications requiring a compact dual-N-channel configuration with minimized parasitic inductance. Evaluate thermal resistance values based on the specific PCB copper area and pad size used in the design to ensure adequate heat dissipation under steady-state or pulsed conditions.

Part Context

This part belongs to the PowerPhase series by onsemi, which focuses on integrated power stages. The DFN8 package (CASE 506CR) allows for efficient surface-mount assembly. The device combines two distinct N-channel MOSFETs optimized for high-side and low-side switching roles within a single footprint.

Replacement Considerations

Consult official substitution guides for compatible dual N-channel MOSFETs in DFN8 packages. Verify that alternative parts match the 30 V rating, current capabilities, and thermal performance requirements of the original design.

FAQ

What are the maximum continuous drain currents for the high-side and low-side FETs?

At TA = 25°C, the high-side FET (Q1) supports 15.4 A, while the low-side FET (Q2) supports 19.5 A.

How does the gate threshold voltage vary with temperature?

The gate threshold voltage exhibits a negative temperature coefficient, decreasing by approximately 5.0 mV/°C for Q1 and 5.1 mV/°C for Q2.

What is the typical reverse recovery charge for the body diodes?

The reverse recovery charge (QRR) is typically 21 nC for Q1 and 39 nC for Q2 under specified test conditions.