SI5342A-B-GM

Clock Generators, PLLs, Frequency Synthesizers Overview

The Skyworks SI5342A-B-GM is a jitter attenuator and clock multiplier featuring four inputs and two outputs. It supports differential input frequencies from 8 kHz to 750 MHz and LVCMOS inputs up to 250 MHz. Output frequencies range from 100 Hz to 1028 MHz for differential signals, or up to 250 MHz for LVCMOS. The device operates on a 1.8 V core voltage (VDD) and a 3.3 V analog supply (VDDA), with independent output supplies selectable at 3.3 V, 2.5 V, or 1.8 V. It utilizes a 44-QFN 7x7 mm package and functions within a temperature range of -40 °C to +85 °C.

Clock Generators, PLLs, Frequency Synthesizers Feature Summary

• Generates any combination of output frequencies from any input frequency using fourth-generation DSPLL technology.
• Supports free-run, synchronous, and holdover modes with automatic or manual input clock switching.
• Features fully integrated loop filter and digitally programmable jitter attenuation bandwidth.
• Includes in-circuit programmable non-volatile memory for known power-up configuration.

Clock Generators, PLLs, Frequency Synthesizers Applications

• OTN muxponders and transponders
• 10/40/100 G networking line cards
• GbE/10 GbE/100 GbE Synchronous Ethernet (ITU-T G.8262)
• Carrier Ethernet switches
• SONET/SDH line cards

Clock Generators, PLLs, Frequency Synthesizers Procurement Notes

Verify the specific ordering suffix against the manufacturer's current documentation to ensure correct factory preprogramming. Confirm that the component meets RoHS-6 compliance requirements for your assembly process. Check for any product change notifications regarding package or material updates before finalizing procurement.

Clock Generators, PLLs, Frequency Synthesizers Selection Notes

Select this model when fractional synthesis is required for output frequencies up to 1028 MHz. Ensure the application requires only two output clocks, as other variants offer higher channel counts. Verify that the system design accommodates the 44-QFN 7x7 mm footprint and provides appropriate thermal management for the specified power dissipation levels.

Clock Generators, PLLs, Frequency Synthesizers Part Context

This component belongs to the Si5342 Rev D family, which combines MultiSynth and DSPLL technologies. It is designed for high-performance jitter attenuation and clock multiplication. The 'A' designation indicates support for integer and fractional synthesis modes across the full frequency range.

Clock Generators, PLLs, Frequency Synthesizers Replacement Considerations

Si5342A-D-GM

Clock Generators, PLLs, Frequency Synthesizers FAQ

What is the maximum output frequency supported by the Si5342A?

The Si5342A supports differential output frequencies up to 1028 MHz and LVCMOS output frequencies up to 250 MHz.

Does the device support glitchless input switching?

Yes, the device can switch between input clock frequencies up to ±500 ppm apart without abrupt phase changes at the output.

How is the loop filter implemented in this component?

The loop filter is fully integrated on-chip, which eliminates the risk of noise coupling associated with discrete external solutions.