SI5363A-A15679-GM

Clock Generators, PLLs, Frequency Synthesizers Overview

The SI5363A-A15679-GM is an 18-output jitter attenuator and clock multiplier from Skyworks Solutions. It integrates three independent DSPLLs with a 72-lead QFN package (10x10 mm). The device supports input frequencies up to 1 GHz (differential) or 250 MHz (LVCMOS), generating output frequencies up to 1.3 GHz via integer dividers or 650 MHz via fractional dividers. Core supply voltage ranges from 1.71 V to 1.89 V, while peripheral supplies operate between 3.14 V and 3.47 V. It features programmable loop bandwidths, hitless switching, and in-circuit NVM for configuration storage.

Clock Generators, PLLs, Frequency Synthesizers Feature Summary

• Integrates three independent DSPLLs for flexible frequency synthesis without MultiSynths
• Supports enhanced hitless switching to minimize phase transients during input clock changes
• Features ultra-low phase jitter performance suitable for high-speed SerDes applications
• Includes in-circuit programmable non-volatile memory for power-up configuration

Clock Generators, PLLs, Frequency Synthesizers Applications

• 56G/112G/224G PAM4 SerDes clocking
• OTN muxponders and transponders
• 100/200/400/600/800G networking line cards
• Datacenter switches

Clock Generators, PLLs, Frequency Synthesizers Procurement Notes

Verify the specific ordering suffix against the manufacturer's current documentation to ensure correct interface and packaging specifications. Confirm availability status directly with authorized distributors as supply levels fluctuate. Ensure the selected variant matches the required ambient temperature range and package type for your design constraints.

Clock Generators, PLLs, Frequency Synthesizers Selection Notes

Select this model when three independent PLLs are required for complex clock tree architectures. Verify that the 1.3 GHz maximum output frequency meets system requirements, noting that higher frequencies may require the Si5361H variant. Ensure compatibility with the ClockBuilder Pro software for configuration and check that the 72-QFN package fits the PCB layout constraints.

Clock Generators, PLLs, Frequency Synthesizers Part Context

This component belongs to the Si536x family of jitter attenuators, which also includes the Si5361 and Si5362 variants. While the Si5361 offers one DSPLL with two MultiSynths and the Si5362 provides two DSPLLs with one MultiSynth, the Si5363 specifically utilizes three DSPLLs with zero MultiSynths. This architecture distinguishes it within the series by prioritizing multiple independent PLL sources over fractional synthesis flexibility.

Clock Generators, PLLs, Frequency Synthesizers Replacement Considerations

The Si5362A-Axxxxx-GM serves as a partial functional substitute if only two independent PLLs are needed. For designs requiring fractional synthesis capabilities not present in the Si5363, the Si5361A-Axxxxx-GM is the appropriate alternative within the same package.