SI5999EDU-T1-GE3

SI5999EDU-T1-GE3

  • Description:MOSFET 2P-CH 20V 6A PPAK CHIPFET
  • Series:TrenchFET®

SKU:844b0d25f884 Category: Brand:

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Product Detailed Parameters

  • Description:MOSFET 2P-CH 20V 6A PPAK CHIPFET
  • Series:TrenchFET®
  • Mfr:Vishay Siliconix
  • Package:Tape & Reel (TR)
  • Technology:MOSFET (Metal Oxide)
  • Configuration:2 P-Channel (Dual)
  • FET Feature:Logic Level Gate
  • Drain to Source Voltage (Vdss):20V
  • Current - Continuous Drain (Id) @ 25°C:6A
  • Rds On (Max) @ Id, Vgs:59mOhm @ 3.5A, 4.5V
  • Vgs(th) (Max) @ Id:1.5V @ 250µA
  • Gate Charge (Qg) (Max) @ Vgs:20nC @ 10V
  • Input Capacitance (Ciss) (Max) @ Vds:496pF @ 10V
  • Power - Max:10.4W
  • Operating Temperature:-55°C ~ 150°C (TJ)
  • Mounting Type:Surface Mount
  • Package / Case:PowerPAK® ChipFET™ Dual
  • Supplier Device Package:PowerPAK® ChipFet Dual
  • Grade:-
  • Qualification:-

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SI5999EDU-T1-GE3

Overview

The Vishay Siliconix SI5999EDU-T1-GE3 is a dual P-channel MOSFET utilizing TrenchFET technology. It features a PowerPAK ChipFET Dual package with a maximum drain-source voltage of -20 V and a continuous drain current of -6 A at TC = 25 °C. The device exhibits a typical on-state resistance of 0.059 Ω at VGS = -4.5 V and 0.096 Ω at VGS = -2.5 V. Total gate charge is typically 6.9 nC at VGS = -4.5 V. Thermal resistance from junction to case is 9.5 °C/W, and the operating junction temperature range spans from -55 °C to +150 °C.

Feature Summary

  • Dual P-channel configuration in a thermally enhanced leadless PowerPAK ChipFET package
  • Low on-resistance achieved through TrenchFET power MOSFET technology
  • Thin 0.8 mm profile with small footprint area for space-constrained designs
  • Typical ESD performance rating of 1500 V in Human Body Model

Applications

  • Load switch applications for portable devices
  • Charger switch circuits in mobile electronics
  • DC/DC converter implementations

Procurement Notes

Verify component authenticity by cross-referencing the marking code OA XXX against official datasheet documentation. Confirm compliance with RoHS Directive 2002/95/EC and IEC 61249-2-21 halogen-free definitions during acquisition. Ensure sourcing channels provide valid traceability records and date codes matching the lot information printed on the package.

Selection Notes

Select this component when a compact dual P-channel solution is required for low-voltage switching. The -20 V rating suits 3.3 V and 5 V logic systems. Evaluate thermal management requirements based on the 9.5 °C/W junction-to-case resistance. Verify that the PCB layout accommodates the specific PowerPAK ChipFET Dual pad dimensions outlined in application note 826.

Part Context

This part belongs to the Vishay Siliconix Si5999EDU series of dual P-channel MOSFETs. It utilizes the PowerPAK ChipFET Dual package, which provides a thin 0.8 mm profile. The product is manufactured using TrenchFET technology to minimize on-resistance while maintaining a small footprint suitable for dense surface mount assemblies.

Replacement Considerations

Direct replacement requires verifying pinout compatibility and electrical parameters. Check if alternative dual P-channel MOSFETs in similar packages meet the -20 V drain-source voltage and 0.059 Ω on-resistance specifications. Ensure the substitute package maintains the same thermal characteristics and physical dimensions.

SI5999EDU-T1-GE3SI5999EDU-T1-GE3

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