APTM50DHM38G

$135.39

Description：MOSFET 2N-CH 500V 90A SP6
Series：-

SKU:4168c32bb933 Category: FET, MOSFET Arrays Brand: Microchip Technology

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Product introduction

Product Detailed Parameters

Description：MOSFET 2N-CH 500V 90A SP6
Series：-
Mfr：Microchip Technology
Package：Bulk
Technology：MOSFET (Metal Oxide)
Configuration：2 N-Channel (Dual) Asymmetrical
FET Feature：-
Drain to Source Voltage (Vdss)：500V
Current - Continuous Drain (Id) @ 25°C：90A
Rds On (Max) @ Id, Vgs：45mOhm @ 45A, 10V
Vgs(th) (Max) @ Id：5V @ 5mA
Gate Charge (Qg) (Max) @ Vgs：246nC @ 10V
Input Capacitance (Ciss) (Max) @ Vds：11200pF @ 25V
Power - Max：694W
Operating Temperature：-40°C ~ 150°C (TJ)
Mounting Type：Chassis Mount
Package / Case：SP6
Supplier Device Package：SP6
Grade：-
Qualification：-

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APTM50DHM38G

Overview

The APTM50DHM38G is a dual N-channel asymmetrical MOSFET module from Microchip Technology, utilizing Silicon technology. It features the PM-MOSFET-7-SP6C package configuration with screw mount installation. The device supports a drain-source voltage of 500 V and continuous drain current of 67 A, with a peak repetitive current of 360 A. Power dissipation is rated at 694 W. Gate-source voltage limits are ±30 V. Operating temperature ranges from -40 C to +150 C.

Feature Summary

Dual N-channel asymmetrical configuration for bridge applications
Integrated thermal management within SP6C chassis mount package
High surge current capability for robust switching performance

Applications

Industrial motor drives
Inverter circuits
Uninterruptible power supplies

Procurement Notes

Verify the specific suffix and revision level against the official Microchip datasheet to ensure compatibility with required thermal interface materials and mounting hardware specifications. Confirm RoHS compliance status and country of origin details prior to procurement to meet regulatory requirements for the target assembly.

Selection Notes

Select this component for high-power applications requiring dual asymmetric configurations in a compact chassis-mount form factor. Evaluate thermal resistance characteristics against system heat sink capabilities. Ensure gate drive voltage levels remain within the specified ±30 V limits to prevent device damage during operation.

Part Context

This module belongs to the POWER MOS 7 family, representing an evolution in silicon power semiconductor packaging. The SP6C package design facilitates efficient heat transfer to chassis structures, supporting higher power densities compared to earlier discrete mounting methods in industrial power electronics systems.