BLF7G24LS-100,112

Overview

The BLF7G24LS-100 is a 100 W LDMOS power transistor designed for base station applications operating between 2300 MHz and 2400 MHz. It supports single carrier IS-95 with pilot, paging, sync, and six traffic channels (Walsh codes 8–13), achieving a peak-to-average ratio of 9.7 dB at 0.01% probability on the CCDF with a channel bandwidth of 1.2288 MHz. The device also handles 3GPP test model 1 with 64 DPCH, providing a peak-to-average ratio of 7.2 dB at 0.01% probability on the CCDF and a channel bandwidth of 3.84 MHz.

Feature Summary

• Excellent ruggedness capable of withstanding VSWR = 10:1 through all phases
• High efficiency and low thermal resistance ensuring excellent thermal stability
• Designed for low memory effects to provide excellent digital pre-distortion capability
• Internally matched for ease of use and integrated ESD protection

Applications

• RF power amplifiers for base stations in the 2300 MHz to 2400 MHz frequency range
• Multi-carrier applications supporting single carrier IS-95 standards
• Multi-carrier applications supporting 3GPP W-CDMA standards

Procurement Notes

Verify the specific package version required for your design. The LS suffix indicates an earless flanged ceramic package (SOT502B) with two leads. Confirm that the ordering information matches the exact pinning and mounting hole requirements specified in the official Ampleon datasheet before finalizing procurement.

Selection Notes

Select this component when designing RF power amplifiers for base stations requiring operation within the 2300 MHz to 2400 MHz band. Ensure the application environment accommodates the specified drain-source voltage and junction temperature limits. Verify compatibility with digital pre-distortion algorithms due to its low memory effect characteristics.

Part Context

This part belongs to the BLF7G24L series of power LDMOS transistors manufactured by Ampleon USA Inc. The BLF7G24LS-100 variant specifically utilizes the SOT502B earless flanged ceramic package. It is engineered for high-power RF applications in cellular infrastructure, offering robust performance under demanding load mismatch conditions.

Replacement Considerations

The BLF7G24L-100 serves as a direct functional equivalent but utilizes the SOT502A flanged ceramic package with mounting holes. When substituting, verify mechanical fitment differences between the SOT502A and SOT502B packages. No other official cross-references are documented in the provided datasheet.

FAQ

What is the maximum load mismatch the BLF7G24LS-100 can withstand?

The device is capable of withstanding a load mismatch corresponding to a VSWR of 10:1 through all phases under specified Class-AB operating conditions.

Does the BLF7G24LS-100 support digital pre-distortion?

Yes, the transistor is specifically designed for low memory effects, which provides excellent digital pre-distortion capability.

What is the typical drain efficiency for single carrier W-CDMA operation?

In single carrier W-CDMA mode (3GPP test model 1, 64 DPCH), the typical drain efficiency is 33% at an average output power of 30 W.