CSD75211W1723

CSD75211W1723

  • Description:MOSFET 2P-CH 20V 4.5A 12DSBGA
  • Series:NexFET™

SKU:297c39f7d263 Category: Brand:

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Product Detailed Parameters

  • Description:MOSFET 2P-CH 20V 4.5A 12DSBGA
  • Series:NexFET™
  • Mfr:Texas Instruments
  • Package:Tape & Reel (TR)
  • Technology:MOSFET (Metal Oxide)
  • Configuration:2 P-Channel (Dual)
  • FET Feature:Logic Level Gate
  • Drain to Source Voltage (Vdss):20V
  • Current - Continuous Drain (Id) @ 25°C:4.5A
  • Rds On (Max) @ Id, Vgs:40mOhm @ 2A, 4.5V
  • Vgs(th) (Max) @ Id:1.1V @ 250µA
  • Gate Charge (Qg) (Max) @ Vgs:5.9nC @ 4.5V
  • Input Capacitance (Ciss) (Max) @ Vds:600pF @ 10V
  • Power - Max:1.5W
  • Operating Temperature:-55°C ~ 150°C (TJ)
  • Mounting Type:Surface Mount
  • Package / Case:12-UFBGA, DSBGA
  • Supplier Device Package:12-DSBGA
  • Grade:-
  • Qualification:-

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CSD75211W1723

Overview

The CSD75211W1723 is a dual P-channel NexFET power MOSFET array in a 12-DSBGA package. It features a -20V drain-source voltage and a continuous drain current of -4.5A. The device offers an ultra-low on-resistance, with RDS(on) reaching 32mΩ at VGS = -4.5V and 40mΩ at VGS = -2.5V. Total gate charge (Qg) is 4.5nC at -4.5V, supporting high-speed switching. Power dissipation is rated at 1.5W, with a junction temperature range from -55°C to 150°C.

Feature Summary

  • Dual P-channel configuration with common source topology
  • Ultra-low gate charge for efficient switching performance
  • Small footprint wafer level package design

Applications

  • Battery management systems
  • Battery protection circuits
  • DC-DC converters

Procurement Notes

Verify the component status before procurement as the part may be discontinued. Confirm that the specific ordering suffix matches the required packaging format. Ensure compliance with RoHS and REACH standards during integration. Validate thermal resistance parameters against the actual PCB copper area used in the final application design.

Selection Notes

Select this component for space-constrained battery-operated applications requiring low profile and minimal footprint. Evaluate the thermal resistance based on the minimum versus maximum copper mounting area requirements. Consider the logic-level gate drive thresholds when designing the control circuitry for optimal conduction characteristics.

Part Context

This device belongs to the NexFET family, designed to deliver low on-resistance and gate charge within a small outline. It utilizes a wafer level package to minimize board space while maintaining necessary thermal characteristics for load management tasks.

Replacement Considerations

CSD86311W1723

CSD75211W1723CSD75211W1723

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