DI008C04PT

$0.12

Description：DI008C04PT
Series：*

SKU:1078501276e4 Category: FET, MOSFET Arrays Brand: Diotec Semiconductor

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Product introduction

Product Detailed Parameters

Description：DI008C04PT
Series：*
Mfr：Diotec Semiconductor
Package：Bulk
Technology：-
Configuration：-
FET Feature：-
Drain to Source Voltage (Vdss)：-
Current - Continuous Drain (Id) @ 25°C：-
Rds On (Max) @ Id, Vgs：-
Vgs(th) (Max) @ Id：-
Gate Charge (Qg) (Max) @ Vgs：-
Input Capacitance (Ciss) (Max) @ Vds：-
Power - Max：-
Operating Temperature：-
Mounting Type：-
Package / Case：-
Supplier Device Package：-
Grade：-
Qualification：-

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DI008C04PT

Overview

The DI008C04PT is a dual N+P channel power MOSFET in a QFN3x3 package. It integrates an N-channel transistor (Q1) with a maximum drain-source voltage of 40 V, continuous drain current of 8 A, and on-state resistance below 18 mΩ at VGS=10V. The complementary P-channel transistor (Q2) features a -40 V breakdown voltage, -5.5 A continuous current, and on-state resistance under 50 mΩ at VGS=-10V. Total gate charge for Q1 is typically 15 nC, while Q2 requires 33 nC. The device operates within a junction temperature range of -55°C to +175°C.

Feature Summary

Integrates two complementary MOSFETs in a compact QFN3x3 footprint
Provides low on-state resistance for efficient power management
Features fast switching times and low gate charge characteristics
Compliant with RoHS, REACH, and Conflict Minerals regulations

Applications

Power Management Units
Battery powered devices
Load Switches and Polarity Protection circuits

Procurement Notes

Verify the specific ordering suffix when purchasing. The standard DI008C04PT represents the commercial/industrial grade. Suffix -Q indicates AEC-Q101 compliance, while -AQ denotes parts currently undergoing AEC-Q101 qualification. Confirm the required reliability grade matches the application environment before placing orders.

Selection Notes

Select this component for applications requiring space-saving dual-transistor solutions. Ensure the design accommodates the thermal resistance of less than 85 K/W by utilizing adequate copper pad areas on the PCB. Verify that the gate drive voltages remain within the ±20 V limit to prevent damage to the gate oxide layer during operation.

Part Context

This component belongs to Diotec Semiconductor's lineup of surface-mount power MOSFETs designed for high-density electronics. It serves as a monolithic solution for replacing discrete N- and P-channel transistors, reducing board space and simplifying assembly processes for portable and industrial electronic systems.