FDC6322C

FET, MOSFET Arrays Overview

The FDC6322C is a dual N and P channel digital field-effect transistor manufactured by onsemi. It integrates two enhancement-mode MOSFETs in a single SOT-23 SuperSOT-6 package. The N-channel device supports a drain-source voltage of 25 V with a maximum continuous current of 0.22 A and an on-resistance of 5 Ω at VGS=2.7 V. The P-channel counterpart provides -25 V breakdown, -0.46 A current capability, and 1.5 Ω on-resistance at VGS=-2.7 V. Operating temperatures range from -55 °C to +150 °C.

FET, MOSFET Arrays Feature Summary

• Replaces discrete NPN and PNP digital transistors without requiring external bias resistors
• Enables direct operation in low voltage circuits due to very low gate drive requirements
• Utilizes high cell density DMOS technology to minimize on-state resistance

FET, MOSFET Arrays Applications

• Load switching applications
• Low voltage logic level control circuits
• Replacement for bipolar digital transistors

FET, MOSFET Arrays Procurement Notes

Verify the component status as obsolete or discontinued through official manufacturer channels before procurement planning. Confirm that the original Fairchild Semiconductor datasheet specifications align with current supply chain availability. Ensure compatibility with existing board layouts designed for the SOT-23 SuperSOT-6 footprint.

FET, MOSFET Arrays Selection Notes

Select this component when replacing discrete digital transistors to reduce bill of materials count. Evaluate thermal resistance characteristics against specific PCB copper pad areas. Verify gate threshold voltage compatibility with the target system logic levels for reliable switching performance.

FET, MOSFET Arrays Part Context

This device belongs to the family of dual digital FETs produced using proprietary DMOS technology. It consolidates separate N-channel and P-channel enhancement mode devices into one compact surface mount package. The design focuses on simplifying circuit topology for low voltage applications.

FET, MOSFET Arrays Replacement Considerations

• FDC6321C
• FDC6320C

FET, MOSFET Arrays FAQ

What is the maximum power dissipation rating?

The maximum power dissipation is 0.9 W under standard conditions and 0.7 W on a smaller copper pad area.

Does the device require external bias resistors?

No, the integrated digital FET design eliminates the need for external bias resistors typically required by bipolar transistors.

What is the ESD protection rating?

The device features an electrostatic discharge rating of 6 kV according to the Human Body Model specification.