IPG20N06S3L-35

FET, MOSFET Arrays Overview

The IPG20N06S3L-35 is a dual N-channel logic level enhancement mode MOSFET from the OptiMOS-T series. It features a PG-TDSON-8-4 package with a maximum drain-source voltage of 55 V and a continuous drain current of 20 A per channel at 25 °C. The device has a maximum on-state resistance of 35 mΩ at VGS=10 V and 62 mΩ at VGS=5 V. Total gate charge is typically 18 nC, and power dissipation reaches 30 W per channel. It operates between -55 °C and +175 °C.

FET, MOSFET Arrays Feature Summary

• Dual N-channel configuration in a compact surface-mount package
• Logic level enhancement mode operation for direct drive compatibility
• AEC Q101 qualified for automotive reliability standards
• High thermal stability supporting up to 175 °C junction temperature

FET, MOSFET Arrays Applications

• Automotive electronic control units
• DC-DC converter circuits
• Power management modules

FET, MOSFET Arrays Procurement Notes

Verify the specific ordering suffix against official Infineon documentation to confirm exact electrical tolerances and packaging specifications. Ensure that the procurement source provides valid traceability data consistent with the manufacturer's quality standards. Cross-reference the component marking code with the datasheet product summary to validate authenticity before integration into production lines.

FET, MOSFET Arrays Selection Notes

Select this component when a dual-channel solution is required within a limited footprint. The logic level threshold allows efficient driving from standard low-voltage logic interfaces. Evaluate the thermal resistance characteristics against the specific PCB copper area available for heat dissipation to ensure safe operating limits are maintained under continuous load conditions.

FET, MOSFET Arrays Part Context

This part belongs to the OptiMOS-T family of power transistors designed by Infineon Technologies. It utilizes silicon technology optimized for low conduction losses and robust switching performance. The device integrates two independent channels within a single leadless package to minimize board space while maintaining high current handling capabilities for modern power electronics applications.

FET, MOSFET Arrays Replacement Considerations

IPG20N06S3L-35A

FET, MOSFET Arrays FAQ

What is the maximum gate-source voltage rating?

The absolute maximum gate-source voltage is ±16 V.

Is the device suitable for avalanche energy applications?

Yes, the datasheet specifies it is 100% avalanche tested with a single pulse avalanche energy rating of 55 mJ at 10 A.

How does the on-state resistance vary with gate voltage?

The maximum RDS(on) is 62 mΩ at VGS=5 V and decreases to 35 mΩ at VGS=10 V.