NDS8958

FET, MOSFET Arrays Overview

The onsemi NDS8958 is a dual N- and P-channel enhancement mode field effect transistor manufactured using high cell density DMOS technology. It provides superior switching performance with minimized on-state resistance in a widely used surface mount package. The N-channel device supports a drain-source voltage of 30 V and continuous current of 5.3 A, while the P-channel device handles -30 V and -4.0 A. Key electrical parameters include an Rds(on) of 0.035 Ω for the N-channel at Vgs=10V and 0.065 Ω for the P-channel at Vgs=-10V. Total gate charge is typically 19 nC for the N-channel and 21 nC for the P-channel.

FET, MOSFET Arrays Feature Summary

• High density cell design minimizes on-state resistance for efficient power handling.
• Dual N- and P-channel configuration integrated into a single surface mount package.
• Optimized for fast switching performance and transient resistance in low voltage applications.

FET, MOSFET Arrays Applications

• Notebook computer power management
• Battery powered circuits requiring fast switching
• Low voltage load switching

FET, MOSFET Arrays Procurement Notes

Verify component authenticity through authorized distributors or direct manufacturer channels. Confirm datasheet revision status as the product may be obsolete. Ensure thermal management aligns with specified junction-to-ambient resistance values for the target PCB layout to maintain reliability within operating temperature ranges.

FET, MOSFET Arrays Selection Notes

Select this component for designs requiring complementary N-P channel pairs in compact SO-8 packages. Evaluate thermal dissipation requirements against the specified junction-to-ambient resistance based on copper pad area. Verify that gate drive voltages match the threshold characteristics for optimal conduction and switching speeds.

FET, MOSFET Arrays Part Context

This component belongs to the PowerTrench family of MOSFETs, utilizing Fairchild's proprietary high-density DMOS process. It serves as a legacy solution for dual-channel power switching applications where space constraints and efficiency are critical factors in system design.

FET, MOSFET Arrays Replacement Considerations

Check for cross-references from other manufacturers offering similar dual N-P channel configurations in SO-8 packages. Verify pinout compatibility and ensure electrical parameters such as breakdown voltage and on-resistance meet or exceed original specifications.

FET, MOSFET Arrays FAQ

What is the maximum steady-state drain current for the N-channel?

The maximum continuous drain current for the N-channel is 5.3 A at TA = 25°C.

How does the on-resistance vary with temperature?

The on-resistance increases with junction temperature; for example, the N-channel Rds(on) rises from 0.035 Ω at 25°C to 0.063 Ω at 125°C under specific test conditions.

What is the typical total gate charge for the P-channel?

The typical total gate charge (Qg) for the P-channel is 21 nC when tested at Vds=-10V, Id=-4.0A, and Vgs=-10V.