NE34018-T1

Overview

The NE34018-T1 is a GaAs Hetero-Junction FET in an SOT-343 plastic package. It operates as a low noise amplifier transistor in the 1-3 GHz range. Key electrical parameters at VDS=2V, IDS=5mA, f=2GHz include a typical Noise Figure of 0.6 dB and Associated Gain of 16.0 dB. At VDS=3V, IDS=30mA, f=2GHz, P1dB is 16.5 dBm and O/P IP3 is 32 dBm. Absolute maximum ratings are VDS=4V, VGDO/VGSO=-3V, TCH=125°C, and PT=150 mW.

Feature Summary

• Utilizes ion implantation fabrication for improved RF performance and uniformity
• Designed for low noise amplification in L-band to S-band frequencies
• Housed in a miniature surface mount plastic package

Applications

• GPS receiver front ends
• PCS (Personal Communications Service) systems
• WLAN (Wireless Local Area Network) applications
• MMDS (Multichannel Multipoint Distribution Service)

Procurement Notes

Verify the specific I_DSS binning code on the reel label or datasheet orderable part number suffix. The -T1 designation indicates tape and reel packaging. Confirm the exact current range (e.g., 30-65 mA vs 60-120 mA) matches the design requirements, as performance varies significantly with bias current and device binning.

Selection Notes

Select based on required noise figure and gain trade-offs against drain current. Higher currents increase gain and output power but raise thermal dissipation. Ensure the PCB layout supports the SOT-343 footprint and provides adequate thermal relief for the exposed source/drain pads to maintain channel temperature within the 125°C limit.

Part Context

Manufactured by California Eastern Laboratories (CEL), this component is a Gallium Arsenide HJ-FET. It serves as a discrete active element for RF circuit designers requiring high linearity and low noise in compact form factors. The device is distinct from integrated MMICs, offering flexibility for custom matching networks.

Replacement Considerations

Public confirmed substitute part numbers are not available in the provided documentation. Designers should consult CEL/NEC official cross-reference lists or evaluate equivalent GaAs HJ-FETs with similar SOT-343 footprints and comparable NF/Gain specifications at 2 GHz.

FAQ

What is the pin configuration for the SOT-343 package?

Pin 1 is Source, Pin 2 is Gate, Pin 3 is Source, and Pin 4 is Drain.

How does the Noise Figure vary with frequency?

At VDS=2V, IDS=10mA, the typical Noise Figure increases from 0.56 dB at 900 MHz to 0.70 dB at 3000 MHz.

What is the maximum total power dissipation?

The absolute maximum rating for total power dissipation is 150 mW at an ambient temperature of 25°C.