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The SQ3585EV-T1_GE3 is an automotive-grade dual MOSFET from Vishay Siliconix, featuring one N-channel and one P-channel device within a single TSOP-6 Dual package. It utilizes TrenchFET technology and holds AEC-Q101 qualification. The N-channel unit provides a drain-source voltage of 20 V, with on-resistance values of 77 mΩ at ±4.5 V gate drive and 120 mΩ at ±2.5 V. Its continuous drain current reaches 3.57 A at 25 °C. The complementary P-channel unit offers identical voltage ratings but supports a maximum continuous drain current of -2.5 A under the same thermal conditions.
Verify component authenticity by cross-referencing the manufacturer's official datasheet document number 75126 against the physical marking on the device. Confirm that the ordering suffix matches the specified TSOP-6 Dual package variant to ensure correct pinout alignment. Validate compliance documentation directly with authorized distribution channels prior to integration into production assemblies.
Select this component when a matched N- and P-channel pair is required within a constrained footprint. Ensure the application operates within the 20 V drain-source voltage limit. Verify that the gate drive voltage meets the minimum threshold requirements for the desired on-state resistance levels. Consider the thermal dissipation capabilities relative to the expected continuous current loads in the specific circuit design.
This part belongs to the SQ series of automotive MOSFETs manufactured by Vishay Siliconix. The series focuses on low-voltage applications utilizing advanced trench gate technology. The TSOP-6 Dual package allows for space-efficient designs where complementary switching actions are necessary within a single semiconductor die assembly.
Direct substitutes must match the TSOP-6 Dual package and provide equivalent N- and P-channel specifications. Verify that any alternative component maintains AEC-Q101 qualification if automotive reliability is required. Pin compatibility and thermal resistance characteristics should be evaluated before implementation.