TSM6502CR RLG

$1.33

Description：MOSFET N/P-CH 60V 24A 8PDFN
Series：-

SKU:333f54f7ab99 Category: FET, MOSFET Arrays Brand: Taiwan Semiconductor Corporation

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Product introduction

Product Detailed Parameters

Description：MOSFET N/P-CH 60V 24A 8PDFN
Series：-
Mfr：Taiwan Semiconductor Corporation
Package：Tape & Reel (TR),Cut Tape (CT)
Technology：MOSFET (Metal Oxide)
Configuration：N and P-Channel
FET Feature：-
Drain to Source Voltage (Vdss)：60V
Current - Continuous Drain (Id) @ 25°C：24A (Tc), 18A (Tc)
Rds On (Max) @ Id, Vgs：34mOhm @ 5.4A, 10V, 68mOhm @ 4A, 10V
Vgs(th) (Max) @ Id：2.5V @ 250µA
Gate Charge (Qg) (Max) @ Vgs：10.3nC @ 4.5V, 9.5nC @ 4.5V
Input Capacitance (Ciss) (Max) @ Vds：1159pF @ 30V, 930pF @ 30V
Power - Max：40W
Operating Temperature：-55°C ~ 150°C (TJ)
Mounting Type：Surface Mount
Package / Case：8-PowerTDFN
Supplier Device Package：8-PDFN (5x6)
Grade：-
Qualification：-

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TSM6502CR RLG

Overview

The TSM6502CR is a dual N- and P-channel power MOSFET in a PDFN56 Dual package, rated for 60V drain-source voltage. The N-channel exhibits a maximum RDS(on) of 34mΩ at VGS=10V and 40mΩ at VGS=4.5V, with a continuous drain current of 24A. The P-channel features a maximum RDS(on) of 68mΩ at VGS=-10V and 110mΩ at VGS=-4.5V, supporting a continuous drain current of -18A. Total gate charge is 10.3nC for the N-channel and 9.5nC for the P-channel. Thermal resistance from junction to case is 3.1°C/W, with an operating junction temperature range of -55°C to +150°C.

Feature Summary

Dual N- and P-channel configuration within a single compact surface-mount package
Optimized low on-resistance to minimize conductive losses across various gate drive voltages
Low total gate charge enabling fast switching speeds and reduced driver requirements
Validated for 100% unclamped inductive switching (UIS) and gate resistance testing

Applications

DC-DC Converters
Power Routing
Motor Drives

Procurement Notes

Verify the specific ordering suffix 'RLG' against the manufacturer's official documentation to confirm reel packaging specifications and quantity. Ensure compliance with RoHS directive 2011/65/EU and WEEE 2002/96/EC standards as stated in the datasheet. Confirm halogen-free status per IEC 61249-2-21 if required by your assembly process.

Selection Notes

Select this component for applications requiring complementary N- and P-channel switching in a space-constrained design. The device supports logic-level operation with RDS(on) specified at VGS=4.5V. Verify that the thermal management strategy accounts for the 61°C/W junction-to-ambient resistance when operating without a dedicated heatsink.

Part Context

This part belongs to Taiwan Semiconductor's lineup of dual MOSFETs designed for efficient power management. It integrates both enhancement-mode N-channel and P-channel transistors into one unit, simplifying bill of materials and board layout for half-bridge or synchronous rectifier topologies.