BUK9K29-100E,115

Overview

The BUK9K29-100E,115 is a dual N-channel TrenchMOS logic level MOSFET in an LFPAK56D (SOT1205) package. It features a drain-source voltage of 100 V and a continuous drain current of 30 A at 25 °C mounting base temperature. The typical on-state resistance is 25.1 mΩ at VGS = 5 V and ID = 5 A. Total gate charge is 54 nC. The device supports junction temperatures up to 175 °C and has a total power dissipation of 68 W.

Feature Summary

• Dual N-channel configuration using TrenchMOS technology for low conduction losses.
• Qualified to AEC-Q101 standard for high-performance automotive applications.
• True logic level gate operation with threshold voltage greater than 0.5 V at 175 °C.
• Repetitive avalanche rated for ruggedness in demanding environments.

Applications

• 12 V Automotive systems
• Motors, lamps and solenoid control
• Start-stop micro-hybrid applications
• Transmission control
• Ultra high performance power switching

Procurement Notes

Verify the specific ordering suffix

Selection Notes

Select this component for designs requiring dual isolated channels in a compact surface-mount footprint. The logic level gate drive simplifies interface with standard microcontrollers or drivers. Ensure thermal management accounts for the 2.21 K/W junction-to-mounting-base resistance to maintain reliability within the specified temperature range.

Part Context

This part belongs to Nexperia's BUK9 series of dual MOSFETs utilizing TrenchMOS technology. It is housed in the LFPAK56D package, also known as Dual Power-SO8. The device is designed specifically for automotive-grade reliability, meeting AEC-Q101 standards while offering high current handling capabilities suitable for power switching tasks.

Replacement Considerations

Direct pin-compatible replacements include the BUK7K29-100EX and BUK7Y29-100E. Verify that alternative packages match the LFPAK56D/SOT1205 outline and confirm electrical parameters such as RDS(on) and Qg meet design requirements.

FAQ

What is the maximum non-repetitive drain-source avalanche energy?

The maximum non-repetitive drain-source avalanche energy is 83 mJ when ID is 30 A, Vsup is less than or equal to 100 V, and the initial junction temperature is 25 °C.

How does the gate-source threshold voltage behave at high temperatures?

The device maintains a true logic level gate with a VGS(th) rating greater than 0.5 V at a junction temperature of 175 °C.

What is the thermal resistance from junction to ambient?

The thermal resistance from junction to ambient is typically 95 K/W when mounted on a minimum footprint printed circuit board.