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DG413LDY is listed in the Analog Switches, Multiplexers, Demultiplexers range at ChipApex. The manufacturer field lists Vishay Siliconix. Its product description is IC SW SPST-NO/NCX4 17OHM 16SOIC. Review the specifications below when checking this part for your BOM.
The DG413LDY is a monolithic quad single-pole single-throw (SPST) CMOS analog switch manufactured by Vishay Siliconix. It features four independent switches with TTL and CMOS compatible digital inputs, designed as drop-in replacements for the DG211 and DG212 series. The device utilizes a high-voltage silicon-gate process to achieve low on-resistance of 35 ohms maximum and fast switching times of 175 ns turn-on and 145 ns turn-off. It supports single supplies from +5V to 44V or split supplies from ±5V to ±20V, enabling control of signals up to 40V peak-to-peak.
Verify the specific suffix 'LDY' against official Vishay documentation, as standard datasheets typically list 'DY' or 'LE'. Confirm RoHS compliance status and package availability directly with the manufacturer or authorized distributors, as lead times and stock levels vary by region and supply chain conditions.
Select this component when requiring mixed logic polarity within a single package, as two switches use negative logic and two use positive logic. Ensure the 35 ohm on-resistance and 175 ns switching speed meet system requirements. Verify that the 44V maximum rating accommodates the highest expected signal voltage and supply rail.
The DG413 belongs to the DG411 series family of precision monolithic quad SPST CMOS analog switches. It shares architectural similarities with the DG411 and DG412 but distinguishes itself through its unique combination of logic polarities across its four channels, facilitating complex switching topologies without external logic gates.
Two switches (#2 and #3) utilize negative logic where a logic 0 turns the switch ON, while the other two switches use positive logic, allowing independent control of turn-on and turn-off times.
The device permits controlling 40V peak-to-peak signals, supported by a maximum voltage range of 44V.
Yes, an epitaxial layer is included in the high-voltage silicon-gate process to prevent latch-up associated with older CMOS technologies.
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