GAL20V8B-25QJI

Programmable Logic Device Pld Overview

The GAL20V8B-25QJI is a discontinued Electrically Erasable Programmable Logic Device (EE PLD) manufactured by Lattice Semiconductor. It utilizes E2CMOS technology and features an industrial temperature range of -40°C to +85°C. The device operates at a supply voltage of 4.50V to 5.50V with a maximum propagation delay of 25 ns. It provides eight output logic macrocells within a 28-pin Plastic Leadless Chip Carrier (PLCC) package.

Programmable Logic Device Pld Feature Summary

• High performance E2CMOS technology with 25 ns maximum propagation delay
• Eight reconfigurable Output Logic Macrocells (OLMCs)
• Industrial grade operation from -40°C to +85°C
• Electronic signature for identification

Programmable Logic Device Pld Applications

• DMA Control
• State Machine Control
• Standard Logic Speed Upgrade

Programmable Logic Device Pld Procurement Notes

This component has been officially discontinued per Product Change Notification PCN#13-10. Verification of availability requires contacting authorized distributors or secondary market suppliers such as Rochester Electronics, as standard manufacturing channels no longer produce this part number.

Programmable Logic Device Pld Selection Notes

Select the GAL20V8B-25QJI only if legacy system compatibility is required. The 'B' suffix indicates Industrial Grade specifications, while 'QJI' denotes Quarter Power consumption and a 28-pin PLCC package. Ensure design software supports the GAL20V8 device type for proper architecture configuration.

Programmable Logic Device Pld Part Context

The GAL20V8 series represents Lattice's Generic Array Logic family. This specific part emulates various PAL architectures including 20R8, 20L8, and 20P2 depending on the configured OLMC mode. It serves as a high-speed CMOS replacement for older bipolar PAL devices.

Programmable Logic Device Pld Replacement Considerations

GAL20V8B-25QJNI

Programmable Logic Device Pld FAQ

What is the maximum clock frequency for the GAL20V8B-25QJI?

The maximum clock frequency is 41.6 MHz with external feedback and 50 MHz with internal feedback.

How many product terms are available per output in registered mode?

In registered mode, registered outputs have eight product terms per output, while I/O configurations have seven product terms per output.

Which pins are permanently configured as Clock and Output Enable in registered mode?

Pin 1 controls the common CLK and Pin 13 controls the common OE for registered outputs; these cannot be used as dedicated inputs in this mode.