NBSG11BAR2

Clock Buffers, Drivers Overview

The NBSG11BAR2 is a 2.5V/3.3V SiGe differential clock driver with RSECL outputs, manufactured by onsemi. It functions as a 1-to-2 fanout buffer optimized for low skew and ultra-low jitter. The device accepts NECL, PECL, CML, LVCMOS, LVTTL, or LVDS inputs via internal 50Ω termination resistors. Outputs provide a 400 mV peak-to-peak RSECL swing. Maximum input frequency reaches 12 GHz typical, with propagation delay at 125 ps typical. It operates within VCC ranges of 2.375 V to 3.465 V (VEE = 0 V) or VEE ranges of -2.375 V to -3.465 V (VCC = 0 V).

Clock Buffers, Drivers Feature Summary

• SiGe technology providing maximum input frequency up to 12 GHz typical.
• Internal 50Ω input termination resistors for simplified interfacing.
• Ultra-low jitter performance with RMS random clock jitter of 0.2 ps typical.
• Differential RSECL outputs with 400 mV peak-to-peak amplitude.

Clock Buffers, Drivers Applications

• High-speed clock distribution networks.
• Data communication systems requiring low skew buffering.
• Telecommunications infrastructure utilizing ECL/CML interfaces.

Clock Buffers, Drivers Procurement Notes

Verify the BA suffix indicates FCBGA-16 packaging in tape and reel format. Confirm RoHS compliance status if required for specific manufacturing processes. Ensure thermal management meets junction-to-ambient resistance requirements for the selected airflow conditions.

Clock Buffers, Drivers Selection Notes

Select based on required operating temperature range; QFN packages support up to 85°C while FCBGA/FCLGA are rated to 70°C. Verify interface compatibility with source logic levels such as LVDS or PECL. Check power supply configuration to determine appropriate VCC or VEE biasing scheme.

Clock Buffers, Drivers Part Context

This component belongs to the NBSG11 series of differential clock drivers. The BAR2 suffix specifically denotes the FCBGA-16 package variant supplied in tape and reel quantities of 100 units per tray. It replaces older discrete buffer solutions in high-frequency applications.

Clock Buffers, Drivers Replacement Considerations

Public confirmed substitute part numbers are not available in the provided documentation. Evaluate alternative models from the same family, such as NBSG11MNG or NBSG11BA, ensuring package and electrical specifications match the design requirements.

Clock Buffers, Drivers FAQ

What is the typical propagation delay of the NBSG11?

The typical propagation delay is 125 ps, with a maximum guaranteed value of 160 ps across the operating temperature range.

How should unused complementary differential inputs be handled for LVCMOS signals?

An external voltage should be applied to the unused complementary input. The nominal voltage is VCC/2 for LVCMOS inputs.

What is the output voltage swing specification?

The device provides a Reduced Swing ECL (RSECL) output with a peak-to-peak amplitude of 400 mV typical, ranging from 350 mV to 525 mV depending on conditions.