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Product Detailed Parameters
- Description：MOSFET N/P-CH 30V 2.5A 6TSOP
- Series：TrenchFET®
- Mfr：Vishay Siliconix
- Package：Tape & Reel (TR),Cut Tape (CT)
- Technology：MOSFET (Metal Oxide)
- Configuration：N and P-Channel
- FET Feature：Logic Level Gate
- Drain to Source Voltage (Vdss)：30V
- Current - Continuous Drain (Id) @ 25°C：2.5A
- Rds On (Max) @ Id, Vgs：105mOhm @ 2.5A, 10V
- Vgs(th) (Max) @ Id：1V @ 250µA (Min)
- Gate Charge (Qg) (Max) @ Vgs：3.2nC @ 5V
- Input Capacitance (Ciss) (Max) @ Vds：-
- Power - Max：1.15W
- Operating Temperature：-55°C ~ 150°C (TJ)
- Mounting Type：Surface Mount
- Package / Case：SOT-23-6 Thin, TSOT-23-6
- Supplier Device Package：6-TSOP
- Grade：-
- Qualification：-
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Overview
The Vishay Siliconix SI3552DV-T1-GE3 is a dual N- and P-channel MOSFET in a TSOP-6 package. It utilizes TrenchFET technology with 100% Rg testing. The N-channel offers VDS of 30 V, ID of 2.5 A, and RDS(on) of 0.105 Ω at VGS = ± 10 V. The P-channel provides VDS of -30 V, ID of -1.8 A, and RDS(on) of 0.200 Ω at VGS = ± 10 V. Operating temperatures range from -55 °C to +150 °C.
Feature Summary
- TrenchFET power MOSFET architecture
- Dual N- and P-channel configuration
- 100% gate resistance tested
Applications
- Battery protection circuits
- Power management systems
- Load switching applications
Procurement Notes
Verify the specific ordering suffix against official documentation to confirm compliance status. The GE3 suffix indicates lead-free and halogen-free material categorization. Confirm RoHS compliance details via the manufacturer's official documentation before procurement.
Selection Notes
Evaluate thermal resistance ratings for the intended mounting conditions on FR4 boards. Ensure gate drive voltages align with specified RDS(on) test conditions. Verify that continuous drain current requirements remain within absolute maximum ratings at expected ambient temperatures.
Part Context
This component belongs to the Vishay Siliconix TrenchFET family. It is designed for surface mount applications requiring compact dual-channel solutions. The TSOP-6 package facilitates efficient PCB layout for low-power switching tasks.
Replacement Considerations
Check datasheet specifications for pinout compatibility and electrical parameter overlaps. Verify package dimensions and thermal characteristics match existing board designs.
FAQ
What is the typical total gate charge for the N-channel?
The typical total gate charge (Qg) for the N-channel is 2.1 nC.
What is the forward transconductance for the P-channel?
The forward transconductance (gfs) for the P-channel is typically 2.4 S.
What are the turn-on delay times for both channels?
The turn-on delay time is typically 7 ns for the N-channel and 8 ns for the P-channel.
