AD9650BCPZ-105

Analog To Digital Converters (ADC) Overview

The AD9650BCPZ-105 is a dual-channel, 16-bit analog-to-digital converter (ADC) operating at a maximum sampling rate of 105 MSPS. It features a multistage differential pipelined architecture with integrated output error correction logic and a shared internal voltage reference. The device supports input frequencies up to 300 MHz with a differential analog input range of 2.7 V p-p. Key performance metrics include an SNR of 82 dBFS at 30 MHz input and 105 MSPS data rate, and an SFDR of 90 dBc under the same conditions. Power consumption is 328 mW per channel at full speed. It operates from a single 1.8 V analog supply and a separate 1.8 V digital driver supply, available in a 64-lead LFCSP package.

Analog To Digital Converters (ADC) Feature Summary

• Multistage differential pipelined architecture with integrated output error correction logic
• Duty cycle stabilizer for maintaining performance despite clock variations
• Optional on-chip dither to improve SFDR with low power analog inputs
• Flexible output configuration supporting 1.8 V CMOS or LVDS formats

Analog To Digital Converters (ADC) Applications

• Industrial instrumentation
• X-Ray, MRI, and ultrasound equipment
• High speed pulse acquisition
• Direct conversion receivers
• General-purpose software radios

Analog To Digital Converters (ADC) Procurement Notes

Verify the specific suffix 'BCPZ-105' against the manufacturer's current ordering guide to confirm the 105 MSPS speed grade and RoHS compliance status. Ensure the procurement source provides valid traceability documentation. Confirm that the 64-lead LFCSP package matches the design footprint requirements. Check for any recent revision history updates that might affect pin compatibility or electrical specifications.

Analog To Digital Converters (ADC) Selection Notes

Select this component when high dynamic range and wide bandwidth are required for dual-channel applications. The 105 MSPS speed grade is suitable for IF sampling frequencies up to 300 MHz. Consider the 1.8 V supply requirement and the availability of LVDS or CMOS interface options for system integration. Evaluate thermal management needs given the 328 mW per channel power dissipation at maximum sampling rates.

Analog To Digital Converters (ADC) Part Context

The AD9650BCPZ-105 belongs to the AD9650 family of dual 16-bit ADCs, which also includes variants rated for 25 MSPS, 65 MSPS, and 80 MSPS. All variants share the same 64-lead LFCSP package and pinout, facilitating easy migration across different bandwidth requirements. The family utilizes a common pipelined architecture with shared features like the duty cycle stabilizer and SPI control interface.

Analog To Digital Converters (ADC) Replacement Considerations

Pin-compatible alternatives within the Analog Devices portfolio include the AD9650BCPZ-25, AD9650BCPZ-65, and AD9650BCPZ-80 for lower speed requirements. Other compatible dual-channel families include the AD9268, AD9269, AD9251, AD9231, and AD9204 series.