SI5345A-B05353-GMR

Clock Generators, PLLs, Frequency Synthesizers Overview

The SI5345A-B05353-GMR is a factory preprogrammed clock synthesizer and jitter cleaner from Skyworks Solutions. It features four inputs and ten outputs, supporting differential frequencies up to 1028 MHz and LVCMOS up to 250 MHz. The device utilizes fourth-generation DSPLL technology for ultra-low jitter performance of 90 fs rms. It operates on a core voltage (VDD) of 1.8 V ±5% and an analog supply (VDDA) of 3.3 V ±5%. The component is housed in a 64-QFN package measuring 9x9 mm and functions within a temperature range of -40 to +85 °C.

Clock Generators, PLLs, Frequency Synthesizers Feature Summary

• Generates any combination of output frequencies from any input frequency using fractional synthesis.
• Integrates non-volatile memory for in-circuit programming and known power-up configurations.
• Supports hitless input switching between fractionally related clocks without phase offset propagation.
• Includes programmable jitter attenuation bandwidth ranging from 0.1 Hz to 4 kHz.

Clock Generators, PLLs, Frequency Synthesizers Applications

• OTN muxponders and transponders
• 10/40/100 G networking line cards
• GbE/10 GbE/100 GbE Synchronous Ethernet (ITU-T G.8262)
• Carrier Ethernet switches
• SONET/SDH line cards

Clock Generators, PLLs, Frequency Synthesizers Procurement Notes

Verify the specific factory preprogrammed configuration associated with the numerical suffix B05353 against the target system requirements. Confirm that the GMR suffix aligns with the required tape and reel packaging format for automated assembly processes. Ensure compatibility with the I2C or SPI serial interface protocols used by the host controller.

Clock Generators, PLLs, Frequency Synthesizers Selection Notes

Select this model when high-frequency differential outputs exceeding 350 MHz are required, distinguishing it from lower-bandwidth variants. The 'A' designation indicates support for integer and fractional synthesis modes across the full frequency range. Verify that the application benefits from the integrated loop filter and non-volatile memory capabilities to simplify board design.

Clock Generators, PLLs, Frequency Synthesizers Part Context

This component belongs to the Si5345 Rev D family, which combines DSPLL and MultiSynth technologies. The Si5345 variant specifically provides four inputs and ten outputs in a 64-QFN package. The part number structure includes a unique numerical sequence assigned by Skyworks to represent the specific preprogrammed frequency configuration.

Clock Generators, PLLs, Frequency Synthesizers Replacement Considerations

SI5345A-D-GMR

Clock Generators, PLLs, Frequency Synthesizers FAQ

What is the maximum differential output frequency supported by this device?

The device supports differential output frequencies up to 1028 MHz.

How does the device handle input clock switching?

It supports both manual and automatic input selection, including hitless switching for fractionally related clocks and glitchless switching for plesiochronous inputs.

What is the purpose of the Fastlock feature?

Fastlock allows the DSPLL to acquire lock faster by temporarily using a higher loop bandwidth during the acquisition process before reverting to the normal low bandwidth setting.