SI5345B-B00021-GMR

Clock Generators, PLLs, Frequency Synthesizers Overview

The SI5345B-B00021-GMR is a factory preprogrammed clock multiplier and jitter attenuator from the Si5345 family. It features four inputs and ten outputs housed in a 64-QFN package. The device supports differential input frequencies up to 750 MHz and LVCMOS inputs up to 250 MHz. Output frequencies range from 100 Hz to 350 MHz for differential signaling and 100 Hz to 250 MHz for LVCMOS. It operates on a core voltage of 1.8 V ±5% and an I/O voltage of 3.3 V ±5%. The component functions within a temperature range of –40 °C to +85 °C.

Clock Generators, PLLs, Frequency Synthesizers Feature Summary

• Generates any combination of output frequencies from any input frequency using fourth-generation DSPLL technology.
• Provides ultra-low jitter performance with a programmable jitter attenuation bandwidth ranging from 0.1 Hz to 4 kHz.
• Supports hitless input clock switching, free-run modes, and holdover capabilities with glitchless output frequency changes.

Clock Generators, PLLs, Frequency Synthesizers Applications

• OTN muxponders and transponders
• 10/40/100 G networking line cards
• GbE/10 GbE/100 GbE Synchronous Ethernet (ITU-T G.8262)
• Carrier Ethernet switches
• SONET/SDH line cards

Clock Generators, PLLs, Frequency Synthesizers Procurement Notes

Verify the specific B00021 suffix against Skyworks documentation to confirm the exact preprogrammed configuration parameters. Factory preprogrammed devices are assigned unique numerical sequences representing their specific configuration. Ensure compatibility with the target application's required frequency plan before procurement.

Clock Generators, PLLs, Frequency Synthesizers Selection Notes

Select this part when fractional synthesis is required with output frequencies capped at 350 MHz. The 'B' designation indicates the lower frequency range compared to the 'A' variant which supports up to 1028 MHz. Use ClockBuilder Pro software to verify that the preprogrammed settings meet the system requirements without needing reconfiguration.

Clock Generators, PLLs, Frequency Synthesizers Part Context

This component belongs to the Si5345/44/42 Rev D family of jitter attenuators. The Si5345 variant specifically provides four inputs and ten outputs in a 9x9 mm 64-QFN package. The family utilizes MultiSynth dividers and a crosspoint switch to connect generated frequencies to any output pin.

Clock Generators, PLLs, Frequency Synthesizers Replacement Considerations

SI5345B-D-GM: Standard version requiring external programming.

Clock Generators, PLLs, Frequency Synthesizers FAQ

What is the maximum output frequency for the SI5345B variant?

The SI5345B variant supports output frequencies up to 350 MHz for differential signaling and 250 MHz for LVCMOS.

How does the device handle input clock failure?

The device automatically enters holdover mode if the selected input clock becomes invalid and no other valid inputs are available, using stored historical frequency data to maintain output stability.

Is the loop filter integrated into the chip?

Yes, the loop filter is fully integrated on-chip, which eliminates the risk of noise coupling associated with discrete solutions.